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-rw-r--r--src/drivers/spi/Kconfig7
-rw-r--r--src/drivers/spi/Makefile.inc2
-rw-r--r--src/drivers/spi/atmel.c226
-rw-r--r--src/drivers/spi/spi_flash.c3
4 files changed, 238 insertions, 0 deletions
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index d832e0c233..4cc439ac8f 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -54,6 +54,13 @@ config SPI_FLASH_AMIC
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by AMIC.
+config SPI_FLASH_ATMEL
+ bool
+ default y
+ help
+ Select this option if your chipset driver needs to store certain
+ data in the SPI flash and your SPI flash is made by Atmel.
+
config SPI_FLASH_EON
bool
default y
diff --git a/src/drivers/spi/Makefile.inc b/src/drivers/spi/Makefile.inc
index d05449bc1c..934743e782 100644
--- a/src/drivers/spi/Makefile.inc
+++ b/src/drivers/spi/Makefile.inc
@@ -4,6 +4,7 @@ ramstage-$(CONFIG_SPI_FLASH) += spi_flash.c
# drivers
ramstage-$(CONFIG_SPI_FLASH_ADESTO) += adesto.c
ramstage-$(CONFIG_SPI_FLASH_AMIC) += amic.c
+ramstage-$(CONFIG_SPI_FLASH_ATMEL) += atmel.c
ramstage-$(CONFIG_SPI_FLASH_EON) += eon.c
ramstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
ramstage-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.c
@@ -20,6 +21,7 @@ smm-$(CONFIG_SPI_FLASH) += spi_flash.c
# drivers
smm-$(CONFIG_SPI_FLASH_ADESTO) += adesto.c
smm-$(CONFIG_SPI_FLASH_AMIC) += amic.c
+smm-$(CONFIG_SPI_FLASH_ATMEL) += atmel.c
smm-$(CONFIG_SPI_FLASH_EON) += eon.c
smm-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.c
smm-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
diff --git a/src/drivers/spi/atmel.c b/src/drivers/spi/atmel.c
new file mode 100644
index 0000000000..4a0dc35e93
--- /dev/null
+++ b/src/drivers/spi/atmel.c
@@ -0,0 +1,226 @@
+/*
+ * Copyright 2008, Network Appliance Inc.
+ * Copyright 2014, Sage Electronic Engineering, LLC.
+ *
+ * Author: Jason McMullan <mcmullan <at> netapp.com>
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <stdlib.h>
+#include <spi_flash.h>
+#include "spi_flash_internal.h"
+
+/* M25Pxx-specific commands */
+#define CMD_AT25_WREN 0x06 /* Write Enable */
+#define CMD_AT25_WRDI 0x04 /* Write Disable */
+#define CMD_AT25_RDSR 0x05 /* Read Status Register */
+#define CMD_AT25_WRSR 0x01 /* Write Status Register */
+#define CMD_AT25_READ 0x03 /* Read Data Bytes */
+#define CMD_AT25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
+#define CMD_AT25_PP 0x02 /* Page Program */
+#define CMD_AT25_SE 0x20 /* Sector (4K) Erase */
+#define CMD_AT25_BE 0xd8 /* Block (64K) Erase */
+#define CMD_AT25_CE 0xc7 /* Chip Erase */
+#define CMD_AT25_DP 0xb9 /* Deep Power-down */
+#define CMD_AT25_RES 0xab /* Release from DP, and Read Signature */
+
+struct atmel_spi_flash_params {
+ uint16_t id;
+ /* Log2 of page size in power-of-two mode */
+ uint8_t l2_page_size;
+ uint16_t pages_per_sector;
+ uint16_t sectors_per_block;
+ uint16_t nr_blocks;
+ const char *name;
+};
+
+/* spi_flash needs to be first so upper layers can free() it */
+struct atmel_spi_flash {
+ struct spi_flash flash;
+ const struct atmel_spi_flash_params *params;
+};
+
+static inline struct atmel_spi_flash *
+to_atmel_spi_flash(struct spi_flash *flash)
+{
+ return container_of(flash, struct atmel_spi_flash, flash);
+}
+
+static const struct atmel_spi_flash_params atmel_spi_flash_table[] = {
+ {
+ .id = 0x3015,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 32,
+ .name = "AT25X16",
+ },
+ {
+ .id = 0x47,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 64,
+ .name = "AT25DF32",
+ },
+ {
+ .id = 0x3017,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 128,
+ .name = "AT25X64",
+ },
+ {
+ .id = 0x4015,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 32,
+ .name = "AT25Q16",
+ },
+ {
+ .id = 0x4016,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 64,
+ .name = "AT25Q32",
+ },
+ {
+ .id = 0x4017,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 128,
+ .name = "AT25Q64",
+ },
+ {
+ .id = 0x4018,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 256,
+ .name = "AT25Q128",
+ },
+};
+
+static int atmel_write(struct spi_flash *flash,
+ u32 offset, size_t len, const void *buf)
+{
+ struct atmel_spi_flash *stm = to_atmel_spi_flash(flash);
+ unsigned long byte_addr;
+ unsigned long page_size;
+ size_t chunk_len;
+ size_t actual;
+ int ret;
+ u8 cmd[4];
+
+ page_size = 1 << stm->params->l2_page_size;
+ byte_addr = offset % page_size;
+
+ flash->spi->rw = SPI_WRITE_FLAG;
+ ret = spi_claim_bus(flash->spi);
+ if (ret) {
+ printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
+ return ret;
+ }
+
+ for (actual = 0; actual < len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+ chunk_len = spi_crop_chunk(sizeof(cmd), chunk_len);
+
+ cmd[0] = CMD_AT25_PP;
+ cmd[1] = (offset >> 16) & 0xff;
+ cmd[2] = (offset >> 8) & 0xff;
+ cmd[3] = offset & 0xff;
+#if CONFIG_DEBUG_SPI_FLASH
+ printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+ " chunk_len = %zu\n", buf + actual,
+ cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
+#endif
+
+ ret = spi_flash_cmd(flash->spi, CMD_AT25_WREN, NULL, 0);
+ if (ret < 0) {
+ printk(BIOS_WARNING, "SF: Enabling Write failed\n");
+ goto out;
+ }
+
+ ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd),
+ buf + actual, chunk_len);
+ if (ret < 0) {
+ printk(BIOS_WARNING, "SF: Atmel Page Program failed\n");
+ goto out;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret)
+ goto out;
+
+ offset += chunk_len;
+ byte_addr = 0;
+ }
+
+#if CONFIG_DEBUG_SPI_FLASH
+ printk(BIOS_SPEW, "SF: Atmel: Successfully programmed %zu bytes @"
+ " 0x%lx\n", len, (unsigned long)(offset - len));
+#endif
+ ret = 0;
+
+out:
+ spi_release_bus(flash->spi);
+ return ret;
+}
+
+static int atmel_erase(struct spi_flash *flash, u32 offset, size_t len)
+{
+ return spi_flash_cmd_erase(flash, CMD_AT25_SE, offset, len);
+}
+
+struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode)
+{
+ const struct atmel_spi_flash_params *params;
+ unsigned page_size;
+ struct atmel_spi_flash *stm;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(atmel_spi_flash_table); i++) {
+ params = &atmel_spi_flash_table[i];
+ if (params->id == ((idcode[1] << 8) | idcode[2]))
+ break;
+ }
+
+ if (i == ARRAY_SIZE(atmel_spi_flash_table)) {
+ printk(BIOS_WARNING, "SF: Unsupported Atmel ID %02x%02x\n",
+ idcode[1], idcode[2]);
+ return NULL;
+ }
+
+ stm = malloc(sizeof(struct atmel_spi_flash));
+ if (!stm) {
+ printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
+ return NULL;
+ }
+
+ stm->params = params;
+ stm->flash.spi = spi;
+ stm->flash.name = params->name;
+
+ /* Assuming power-of-two page size initially. */
+ page_size = 1 << params->l2_page_size;
+
+ stm->flash.write = atmel_write;
+ stm->flash.erase = atmel_erase;
+#if CONFIG_SPI_FLASH_NO_FAST_READ
+ stm->flash.read = spi_flash_cmd_read_slow;
+#else
+ stm->flash.read = spi_flash_cmd_read_fast;
+#endif
+ stm->flash.sector_size = (1 << stm->params->l2_page_size) *
+ stm->params->pages_per_sector;
+ stm->flash.size = page_size * params->pages_per_sector
+ * params->sectors_per_block
+ * params->nr_blocks;
+
+ return &stm->flash;
+}
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 626d5069b0..2750a37c86 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -218,6 +218,9 @@ static struct {
#if CONFIG_SPI_FLASH_AMIC
{ 0, 0x37, spi_flash_probe_amic, },
#endif
+#if CONFIG_SPI_FLASH_ATMEL
+ { 0, 0x1f, spi_flash_probe_atmel, },
+#endif
#if CONFIG_SPI_FLASH_EON
{ 0, 0x1c, spi_flash_probe_eon, },
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 10:57:11 +0000