diff options
Diffstat (limited to 'src/drivers')
-rw-r--r-- | src/drivers/ati/ragexl/atyfb.h | 2 | ||||
-rw-r--r-- | src/drivers/ati/ragexl/fb.h | 2 | ||||
-rw-r--r-- | src/drivers/ati/ragexl/xlinit.c | 6 | ||||
-rw-r--r-- | src/drivers/generic/ioapic/chip.h | 2 | ||||
-rw-r--r-- | src/drivers/generic/ioapic/ioapic.c | 6 | ||||
-rw-r--r-- | src/drivers/intel/gma/edid.c | 4 | ||||
-rw-r--r-- | src/drivers/intel/gma/edid.h | 2 | ||||
-rw-r--r-- | src/drivers/usb/ehci_debug.c | 106 | ||||
-rw-r--r-- | src/drivers/usb/pci_ehci.c | 6 |
9 files changed, 68 insertions, 68 deletions
diff --git a/src/drivers/ati/ragexl/atyfb.h b/src/drivers/ati/ragexl/atyfb.h index 94f31fe86e..df8dd3dd44 100644 --- a/src/drivers/ati/ragexl/atyfb.h +++ b/src/drivers/ati/ragexl/atyfb.h @@ -104,7 +104,7 @@ struct fb_info_aty { struct fb_info_aty *next; unsigned long ati_regbase_phys; #endif - unsigned long ati_regbase; + u8 *ati_regbase; #if 0 unsigned long frame_buffer_phys; #endif diff --git a/src/drivers/ati/ragexl/fb.h b/src/drivers/ati/ragexl/fb.h index 48d0f0172f..f112d0e575 100644 --- a/src/drivers/ati/ragexl/fb.h +++ b/src/drivers/ati/ragexl/fb.h @@ -124,7 +124,7 @@ struct fb_fix_screeninfo { u16 ypanstep; /* zero if no hardware panning */ u16 ywrapstep; /* zero if no hardware ywrap */ u32 line_length; /* length of a line in bytes */ - unsigned long mmio_start; /* Start of Memory Mapped I/O */ + u8 *mmio_start; /* Start of Memory Mapped I/O */ /* (physical address) */ u32 mmio_len; /* Length of Memory Mapped I/O */ u32 accel; /* Type of acceleration available */ diff --git a/src/drivers/ati/ragexl/xlinit.c b/src/drivers/ati/ragexl/xlinit.c index 41cea72a04..19291809af 100644 --- a/src/drivers/ati/ragexl/xlinit.c +++ b/src/drivers/ati/ragexl/xlinit.c @@ -537,13 +537,13 @@ static void ati_ragexl_init(struct device *dev) #endif /* CONFIG_CONSOLE_BTEXT */ #if USE_AUX_REG==0 - info->ati_regbase = res->base+0x7ff000+0xc00; + info->ati_regbase = res2mmio(res, 0x7ff000+0xc00, 0); #else /* Fix this to look for the correct index. */ //if (dev->resource_list && dev->resource_list->next) res = dev->resource_list->next->next; if(res->flags & IORESOURCE_MEM) { - info->ati_regbase = res->base+0x400; //using auxiliary register + info->ati_regbase = res2mmio(res, 0x400, 0); //using auxiliary register } #endif @@ -553,7 +553,7 @@ static void ati_ragexl_init(struct device *dev) #endif #if 0 - printk(BIOS_DEBUG, "ati_regbase = 0x%08x, frame_buffer = 0x%08x\n", info->ati_regbase, info->frame_buffer); + printk(BIOS_DEBUG, "ati_regbase = 0x%p, frame_buffer = 0x%08x\n", info->ati_regbase, info->frame_buffer); #endif chip_id = aty_ld_le32(CONFIG_CHIP_ID, info); diff --git a/src/drivers/generic/ioapic/chip.h b/src/drivers/generic/ioapic/chip.h index 665e926aea..e74c60c1a2 100644 --- a/src/drivers/generic/ioapic/chip.h +++ b/src/drivers/generic/ioapic/chip.h @@ -27,7 +27,7 @@ typedef struct drivers_generic_ioapic_config { u8 irq_on_fsb; u8 enable_virtual_wire; u8 have_isa_interrupts; - u32 base; + void *base; } ioapic_config_t; #endif diff --git a/src/drivers/generic/ioapic/ioapic.c b/src/drivers/generic/ioapic/ioapic.c index 463474a30d..44f1b02424 100644 --- a/src/drivers/generic/ioapic/ioapic.c +++ b/src/drivers/generic/ioapic/ioapic.c @@ -18,7 +18,7 @@ static void ioapic_init(struct device *dev) u32 bsp_lapicid = lapicid(); u32 low, high; u32 i, ioapic_interrupts; - u32 ioapic_base; + void *ioapic_base; u8 ioapic_id; if (!dev->enabled || !config) @@ -27,7 +27,7 @@ static void ioapic_init(struct device *dev) ioapic_base = config->base; ioapic_id = config->apicid; - printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", + printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%p\n", ioapic_base); printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n", bsp_lapicid); @@ -93,7 +93,7 @@ static void ioapic_read_resources(struct device *dev) struct resource *res; res = new_resource(dev, 0); - res->base = config->base; + res->base = (resource_t)(uintptr_t)config->base; res->size = 0x1000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c index 91ad7428ce..36d8813f00 100644 --- a/src/drivers/intel/gma/edid.c +++ b/src/drivers/intel/gma/edid.c @@ -26,7 +26,7 @@ #include "i915_reg.h" #include "edid.h" -static void wait_rdy(u32 mmio) +static void wait_rdy(u8 *mmio) { unsigned try = 100; @@ -37,7 +37,7 @@ static void wait_rdy(u32 mmio) } } -void intel_gmbus_read_edid(u32 mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size) +void intel_gmbus_read_edid(u8 *mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size) { int i; diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h index cb54b46f03..c4763919bd 100644 --- a/src/drivers/intel/gma/edid.h +++ b/src/drivers/intel/gma/edid.h @@ -1 +1 @@ -void intel_gmbus_read_edid(u32 gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size); +void intel_gmbus_read_edid(u8 *gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size); diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 83c23a3031..379a1bdebe 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -78,7 +78,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug) int loop = 0; do { - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); /* Stop when the transaction is finished */ if (ctrl & DBGP_DONE) break; @@ -92,7 +92,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug) /* Now that we have observed the completed transaction, * clear the done bit. */ - write32((unsigned long)&ehci_debug->control, ctrl | DBGP_DONE); + write32(&ehci_debug->control, ctrl | DBGP_DONE); return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); } @@ -122,10 +122,10 @@ host_retry: if (loop == 1 || host_retries > 1) dprintk(BIOS_SPEW, "dbgp: start (@ %3d,%d) ctrl=%08x\n", loop, host_retries, ctrl | DBGP_GO); - write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO); + write32(&ehci_debug->control, ctrl | DBGP_GO); ret = dbgp_wait_until_complete(ehci_debug); - rd_ctrl = read32((unsigned long)&ehci_debug->control); - rd_pids = read32((unsigned long)&ehci_debug->pids); + rd_ctrl = read32(&ehci_debug->control); + rd_pids = read32(&ehci_debug->pids); if (rd_ctrl != ctrl_prev || rd_pids != pids_prev || (ret<0)) { ctrl_prev = rd_ctrl; @@ -184,8 +184,8 @@ static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int lo |= bytes[i] << (8*i); for (; i < 8 && i < size; i++) hi |= bytes[i] << (8*(i - 4)); - write32((unsigned long)&ehci_debug->data03, lo); - write32((unsigned long)&ehci_debug->data47, hi); + write32(&ehci_debug->data03, lo); + write32(&ehci_debug->data47, hi); } static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) @@ -194,8 +194,8 @@ static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) u32 lo, hi; int i; - lo = read32((unsigned long)&ehci_debug->data03); - hi = read32((unsigned long)&ehci_debug->data47); + lo = read32(&ehci_debug->data03); + hi = read32(&ehci_debug->data47); for (i = 0; i < 4 && i < size; i++) bytes[i] = (lo >> (8*i)) & 0xff; for (; i < 8 && i < size; i++) @@ -205,9 +205,9 @@ static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) #if CONFIG_DEBUG_USBDEBUG static void dbgp_print_data(struct ehci_dbg_port *ehci_debug) { - u32 ctrl = read32((unsigned long)&ehci_debug->control); - u32 lo = read32((unsigned long)&ehci_debug->data03); - u32 hi = read32((unsigned long)&ehci_debug->data47); + u32 ctrl = read32(&ehci_debug->control); + u32 lo = read32(&ehci_debug->data03); + u32 hi = read32(&ehci_debug->data47); int len = DBGP_LEN(ctrl); if (len) { int i; @@ -233,13 +233,13 @@ static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *p addr = DBGP_EPADDR(pipe->devnum, pipe->endpoint); pids = DBGP_PID_SET(pipe->pid, USB_PID_OUT); - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, size); ctrl |= DBGP_OUT; dbgp_set_data(ehci_debug, bytes, size); - write32((unsigned long)&ehci_debug->address, addr); - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, pipe, ctrl, pipe->timeout); @@ -264,12 +264,12 @@ static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *pi addr = DBGP_EPADDR(pipe->devnum, pipe->endpoint); pids = DBGP_PID_SET(pipe->pid, USB_PID_IN); - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, size); ctrl &= ~DBGP_OUT; - write32((unsigned long)&ehci_debug->address, addr); - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, pipe, ctrl, pipe->timeout); if (ret < 0) return ret; @@ -324,14 +324,14 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ addr = DBGP_EPADDR(pipe->devnum, pipe->endpoint); pids = DBGP_PID_SET(pipe->pid, USB_PID_SETUP); - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req)); ctrl |= DBGP_OUT; /* Setup stage */ dbgp_set_data(ehci_debug, &req, sizeof(req)); - write32((unsigned long)&ehci_debug->address, addr); - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, pipe, ctrl, 1); if (ret < 0) return ret; @@ -344,7 +344,7 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ /* Status stage in opposite direction */ pipe->pid = USB_PID_DATA1; - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, 0); if (read) { pids = DBGP_PID_SET(pipe->pid, USB_PID_OUT); @@ -354,7 +354,7 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ ctrl &= ~DBGP_OUT; } - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->pids, pids); ret2 = dbgp_wait_until_done(ehci_debug, pipe, ctrl, pipe->timeout); if (ret2 < 0) return ret2; @@ -368,21 +368,21 @@ static int ehci_reset_port(struct ehci_regs *ehci_regs, int port) int loop; /* Reset the usb debug port */ - portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); + portsc = read32(&ehci_regs->port_status[port - 1]); portsc &= ~PORT_PE; portsc |= PORT_RESET; - write32((unsigned long)&ehci_regs->port_status[port - 1], portsc); + write32(&ehci_regs->port_status[port - 1], portsc); dbgp_mdelay(HUB_ROOT_RESET_TIME); - portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); - write32((unsigned long)&ehci_regs->port_status[port - 1], + portsc = read32(&ehci_regs->port_status[port - 1]); + write32(&ehci_regs->port_status[port - 1], portsc & ~(PORT_RWC_BITS | PORT_RESET)); loop = 100; do { dbgp_mdelay(1); - portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); + portsc = read32(&ehci_regs->port_status[port - 1]); } while ((portsc & PORT_RESET) && (--loop > 0)); /* Device went away? */ @@ -407,7 +407,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) for (reps = 0; reps < 3; reps++) { dbgp_mdelay(100); - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); if (status & STS_PCD) { ret = ehci_reset_port(ehci_regs, port); if (ret == 0) @@ -440,7 +440,7 @@ static int usbdebug_init_(unsigned ehci_bar, unsigned offset, struct ehci_debug_ ehci_caps = (struct ehci_caps *)ehci_bar; ehci_regs = (struct ehci_regs *)(ehci_bar + - HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase))); + HC_LENGTH(read32(&ehci_caps->hc_capbase))); struct ehci_dbg_port *ehci_debug = info->ehci_debug; @@ -453,7 +453,7 @@ try_next_time: port_map_tried = 0; try_next_port: - hcs_params = read32((unsigned long)&ehci_caps->hcs_params); + hcs_params = read32(&ehci_caps->hcs_params); debug_port = HCS_DEBUG_PORT(hcs_params); n_ports = HCS_N_PORTS(hcs_params); @@ -461,7 +461,7 @@ try_next_port: dprintk(BIOS_INFO, "n_ports: %d\n", n_ports); for (i = 1; i <= n_ports; i++) { - portsc = read32((unsigned long)&ehci_regs->port_status[i-1]); + portsc = read32(&ehci_regs->port_status[i-1]); dprintk(BIOS_INFO, "PORTSC #%d: %08x\n", i, portsc); } @@ -474,15 +474,15 @@ try_next_port: } /* Wait until the controller is halted */ - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); if (!(status & STS_HALT)) { - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); cmd &= ~CMD_RUN; - write32((unsigned long)&ehci_regs->command, cmd); + write32(&ehci_regs->command, cmd); loop = 100; do { dbgp_mdelay(10); - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); } while (!(status & STS_HALT) && (--loop > 0)); if (status & STS_HALT) dprintk(BIOS_INFO, "EHCI controller halted successfully.\n"); @@ -492,12 +492,12 @@ try_next_port: loop = 100; /* Reset the EHCI controller */ - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); cmd |= CMD_RESET; - write32((unsigned long)&ehci_regs->command, cmd); + write32(&ehci_regs->command, cmd); do { dbgp_mdelay(10); - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); } while ((cmd & CMD_RESET) && (--loop > 0)); if(!loop) { @@ -509,25 +509,25 @@ try_next_port: } /* Claim ownership, but do not enable yet */ - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl |= DBGP_OWNER; ctrl &= ~(DBGP_ENABLED | DBGP_INUSE); - write32((unsigned long)&ehci_debug->control, ctrl); + write32(&ehci_debug->control, ctrl); /* Start EHCI controller */ - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET); cmd |= CMD_RUN; - write32((unsigned long)&ehci_regs->command, cmd); + write32(&ehci_regs->command, cmd); /* Ensure everything is routed to the EHCI */ - write32((unsigned long)&ehci_regs->configured_flag, FLAG_CF); + write32(&ehci_regs->configured_flag, FLAG_CF); /* Wait until the controller is no longer halted */ loop = 10; do { dbgp_mdelay(10); - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); } while ((status & STS_HALT) && (--loop > 0)); if(!loop) { @@ -546,13 +546,13 @@ try_next_port: /* Enable the debug port */ - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl |= DBGP_CLAIM; - write32((unsigned long)&ehci_debug->control, ctrl); - ctrl = read32((unsigned long)&ehci_debug->control); + write32(&ehci_debug->control, ctrl); + ctrl = read32(&ehci_debug->control); if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) { dprintk(BIOS_INFO, "No device in EHCI debug port.\n"); - write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM); + write32(&ehci_debug->control, ctrl & ~DBGP_CLAIM); ret = -4; goto err; } @@ -560,9 +560,9 @@ try_next_port: #if 0 /* Completely transfer the debug device to the debug controller */ - portsc = read32((unsigned long)&ehci_regs->port_status[debug_port - 1]); + portsc = read32(&ehci_regs->port_status[debug_port - 1]); portsc &= ~PORT_PE; - write32((unsigned long)&ehci_regs->port_status[debug_port - 1], portsc); + write32(&ehci_regs->port_status[debug_port - 1], portsc); #endif dbgp_mdelay(100); @@ -577,9 +577,9 @@ try_next_port: return 0; err: /* Things didn't work so remove my claim */ - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl &= ~(DBGP_CLAIM | DBGP_OUT); - write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl); + write32(&ehci_debug->control, ctrl); //return ret; next_debug_port: diff --git a/src/drivers/usb/pci_ehci.c b/src/drivers/usb/pci_ehci.c index 8fe78b1f0e..04f8232e92 100644 --- a/src/drivers/usb/pci_ehci.c +++ b/src/drivers/usb/pci_ehci.c @@ -103,13 +103,13 @@ void pci_ehci_read_resources(struct device *dev) } #endif -unsigned long pci_ehci_base_regs(pci_devfn_t sdev) +u8 *pci_ehci_base_regs(pci_devfn_t sdev) { #ifdef __SIMPLE_DEVICE__ - unsigned long base = pci_read_config32(sdev, EHCI_BAR_INDEX) & ~0x0f; + u8 *base = (u8 *)(pci_read_config32(sdev, EHCI_BAR_INDEX) & ~0x0f); #else device_t dev = dev_find_slot(PCI_DEV2SEGBUS(sdev), PCI_DEV2DEVFN(sdev)); - unsigned long base = pci_read_config32(dev, EHCI_BAR_INDEX) & ~0x0f; + u8 *base = (u8 *)(pci_read_config32(dev, EHCI_BAR_INDEX) & ~0x0f); #endif return base + HC_LENGTH(read32(base)); } |