diff options
Diffstat (limited to 'src/drivers')
-rw-r--r-- | src/drivers/spi/Makefile.inc | 6 | ||||
-rw-r--r-- | src/drivers/spi/bitbang.c | 84 |
2 files changed, 90 insertions, 0 deletions
diff --git a/src/drivers/spi/Makefile.inc b/src/drivers/spi/Makefile.inc index 3f68541448..edea392db1 100644 --- a/src/drivers/spi/Makefile.inc +++ b/src/drivers/spi/Makefile.inc @@ -18,6 +18,7 @@ smm-$(CONFIG_DEBUG_SMI) += flashconsole.c endif bootblock-y += spi-generic.c +bootblock-y += bitbang.c bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c bootblock-$(CONFIG_SPI_FLASH) += spi_flash.c bootblock-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY) += boot_device_rw_nommap.c @@ -34,6 +35,7 @@ bootblock-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c bootblock-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c romstage-y += spi-generic.c +romstage-y += bitbang.c romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c romstage-$(CONFIG_SPI_FLASH) += spi_flash.c romstage-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY) += boot_device_rw_nommap.c @@ -50,6 +52,7 @@ romstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c romstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c verstage-y += spi-generic.c +verstage-y += bitbang.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c verstage-$(CONFIG_SPI_FLASH) += spi_flash.c verstage-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY) += boot_device_rw_nommap.c @@ -66,6 +69,7 @@ verstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c verstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c ramstage-y += spi-generic.c +ramstage-y += bitbang.c ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c ramstage-$(CONFIG_SPI_FLASH) += spi_flash.c ramstage-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP) += boot_device_rw_nommap.c @@ -83,6 +87,7 @@ ramstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c ifeq ($(CONFIG_SPI_FLASH_SMM),y) smm-y += spi-generic.c +smm-y += bitbang.c # SPI flash driver interface smm-$(CONFIG_SPI_FLASH) += spi_flash.c smm-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP) += boot_device_rw_nommap.c @@ -102,5 +107,6 @@ smm-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c endif postcar-y += spi-generic.c +postcar-y += bitbang.c postcar-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY) += boot_device_rw_nommap.c postcar-$(CONFIG_SPI_FLASH) += spi_flash.c diff --git a/src/drivers/spi/bitbang.c b/src/drivers/spi/bitbang.c new file mode 100644 index 0000000000..d858345859 --- /dev/null +++ b/src/drivers/spi/bitbang.c @@ -0,0 +1,84 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <delay.h> +#include <spi_bitbang.h> + +/* Set to 1 to dump all SPI transfers to the UART. */ +#define TRACE 0 +/* + * In theory, this should work fine with 0 delay since the bus is fully clocked + * by the master and the slave just needs to follow clock transitions whenever + * they happen. We're not going to be "too fast" by bit-banging anyway. However, + * if something doesn't work right, try increasing this value to slow it down. + */ +#define HALF_CLOCK_US 0 + +int spi_bitbang_claim_bus(const struct spi_bitbang_ops *ops) +{ + ops->set_cs(ops, 0); + return 0; +} + +void spi_bitbang_release_bus(const struct spi_bitbang_ops *ops) +{ + ops->set_cs(ops, 1); +} + +/* Implements a CPOL=0, CPH=0, MSB first 8-bit controller. */ +int spi_bitbang_xfer(const struct spi_bitbang_ops *ops, const void *dout, + size_t bytes_out, void *din, size_t bytes_in) +{ + if (TRACE) { + if (bytes_in && bytes_out) + printk(BIOS_SPEW, "!"); + else if (bytes_in) + printk(BIOS_SPEW, "<"); + else if (bytes_out) + printk(BIOS_SPEW, ">"); + } + + while (bytes_out || bytes_in) { + int i; + uint8_t in_byte = 0, out_byte = 0; + if (bytes_out) { + out_byte = *(const uint8_t *)dout++; + bytes_out--; + if (TRACE) + printk(BIOS_SPEW, "%02x", out_byte); + } + for (i = 7; i >= 0; i--) { + ops->set_mosi(ops, !!(out_byte & (1 << i))); + if (HALF_CLOCK_US) + udelay(HALF_CLOCK_US); + ops->set_clk(ops, 1); + in_byte |= !!ops->get_miso(ops) << i; + if (HALF_CLOCK_US) + udelay(HALF_CLOCK_US); + ops->set_clk(ops, 0); + } + if (bytes_in) { + *(uint8_t *)din++ = in_byte; + bytes_in--; + if (TRACE) + printk(BIOS_SPEW, "%02x", in_byte); + } + } + + if (TRACE) + printk(BIOS_SPEW, "\n"); + return 0; +} |