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-rw-r--r--src/drivers/ipmi/ocp/Makefile.inc3
-rw-r--r--src/drivers/ipmi/ocp/ipmi_ocp.c27
-rw-r--r--src/drivers/ipmi/ocp/ipmi_ocp.h30
-rw-r--r--src/drivers/ipmi/ocp/ipmi_ocp_romstage.c76
4 files changed, 136 insertions, 0 deletions
diff --git a/src/drivers/ipmi/ocp/Makefile.inc b/src/drivers/ipmi/ocp/Makefile.inc
index 8291f82677..c77ee4a964 100644
--- a/src/drivers/ipmi/ocp/Makefile.inc
+++ b/src/drivers/ipmi/ocp/Makefile.inc
@@ -1 +1,4 @@
ramstage-$(CONFIG_IPMI_OCP) += ipmi_ocp.c
+ifeq ($(CONFIG_IPMI_OCP),y)
+romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi_ocp_romstage.c
+endif
diff --git a/src/drivers/ipmi/ocp/ipmi_ocp.c b/src/drivers/ipmi/ocp/ipmi_ocp.c
index 07628ee1ff..ee38bb0076 100644
--- a/src/drivers/ipmi/ocp/ipmi_ocp.c
+++ b/src/drivers/ipmi/ocp/ipmi_ocp.c
@@ -12,6 +12,7 @@
#include <device/device.h>
#include <device/pnp.h>
#include <drivers/ipmi/ipmi_kcs.h>
+#include <drivers/ocp/dmi/ocp_dmi.h>
#include <intelblocks/cpulib.h>
#include <string.h>
#include <types.h>
@@ -115,6 +116,30 @@ static void ipmi_set_processor_information(struct device *dev)
printk(BIOS_ERR, "IPMI BMC set param 2 processor info failed\n");
}
+static enum cb_err ipmi_set_ppin(struct device *dev)
+{
+ int ret;
+ struct ipmi_rsp rsp;
+ struct ppin_req req = {0};
+
+ req.cpu0_lo = xeon_sp_ppin[0].lo;
+ req.cpu0_hi = xeon_sp_ppin[0].hi;
+ if (CONFIG_MAX_SOCKET > 1) {
+ req.cpu1_lo = xeon_sp_ppin[1].lo;
+ req.cpu1_hi = xeon_sp_ppin[1].hi;
+ }
+ ret = ipmi_kcs_message(dev->path.pnp.port, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN,
+ (const unsigned char *) &req, sizeof(req), (unsigned char *) &rsp, sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
+ __func__, ret, rsp.completion_code);
+ return CB_ERR;
+ }
+ printk(BIOS_DEBUG, "IPMI: %s command success\n", __func__);
+ return CB_SUCCESS;
+}
+
static void ipmi_ocp_init(struct device *dev)
{
/* Add OCP specific IPMI command */
@@ -126,6 +151,8 @@ static void ipmi_ocp_final(struct device *dev)
/* Send processor information */
ipmi_set_processor_information(dev);
+ if (CONFIG(OCP_DMI))
+ ipmi_set_ppin(dev);
}
static void ipmi_set_resources(struct device *dev)
diff --git a/src/drivers/ipmi/ocp/ipmi_ocp.h b/src/drivers/ipmi/ocp/ipmi_ocp.h
index 96b0086298..0c9f452db5 100644
--- a/src/drivers/ipmi/ocp/ipmi_ocp.h
+++ b/src/drivers/ipmi/ocp/ipmi_ocp.h
@@ -7,6 +7,12 @@
#include <cpu/x86/name.h>
#include "drivers/ipmi/ipmi_kcs.h"
+#define IPMI_NETFN_OEM 0x30
+#define IPMI_OEM_SET_PPIN 0x77
+#define IPMI_BMC_SET_POST_START 0x73
+#define IPMI_OEM_SET_BIOS_BOOT_ORDER 0x52
+#define IPMI_OEM_GET_BIOS_BOOT_ORDER 0x53
+
#define IPMI_NETFN_OEM_COMMON 0x36
#define IPMI_BMC_SET_PROCESSOR_INFORMATION 0x10
#define IPMI_BMC_GET_PROCESSOR_INFORMATION 0x11
@@ -14,6 +20,12 @@
#define MSR_CORE_THREAD_COUNT 0x35
#define MSR_PLATFORM_INFO 0xce
+#define CMOS_BIT (1 << 1)
+#define VALID_BIT (1 << 7)
+#define CLEAR_CMOS_AND_VALID_BIT(x) ((x) &= ~(CMOS_BIT | VALID_BIT))
+#define SET_CMOS_AND_VALID_BIT(x) ((x) |= (CMOS_BIT | VALID_BIT))
+#define IS_CMOS_AND_VALID_BIT(x) ((x)&CMOS_BIT && (x)&VALID_BIT)
+
struct ipmi_processor_info_req {
uint8_t manufacturer_id[3];
uint8_t index;
@@ -33,4 +45,22 @@ struct ipmi_processor_info_param2_req {
char revision[2];
} __packed;
+struct ppin_req {
+ uint32_t cpu0_lo;
+ uint32_t cpu0_hi;
+ uint32_t cpu1_lo;
+ uint32_t cpu1_hi;
+} __packed;
+
+struct boot_order {
+ uint8_t boot_mode;
+ uint8_t boot_dev0;
+ uint8_t boot_dev1;
+ uint8_t boot_dev2;
+ uint8_t boot_dev3;
+ uint8_t boot_dev4;
+} __packed;
+
+enum cb_err ipmi_set_post_start(const int port);
+enum cb_err ipmi_set_cmos_clear(void);
#endif
diff --git a/src/drivers/ipmi/ocp/ipmi_ocp_romstage.c b/src/drivers/ipmi/ocp/ipmi_ocp_romstage.c
new file mode 100644
index 0000000000..8e43d8d159
--- /dev/null
+++ b/src/drivers/ipmi/ocp/ipmi_ocp_romstage.c
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <console/console.h>
+#include <drivers/ipmi/ipmi_kcs.h>
+
+#include "ipmi_ocp.h"
+
+enum cb_err ipmi_set_post_start(const int port)
+{
+ int ret;
+ struct ipmi_rsp rsp;
+
+ ret = ipmi_kcs_message(port, IPMI_NETFN_OEM, 0x0,
+ IPMI_BMC_SET_POST_START, NULL, 0, (u8 *) &rsp,
+ sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (ret=%d rsp=0x%x)\n",
+ __func__, ret, rsp.completion_code);
+ return CB_ERR;
+ }
+ if (ret != sizeof(rsp)) {
+ printk(BIOS_ERR, "IPMI: %s response truncated\n", __func__);
+ return CB_ERR;
+ }
+
+ printk(BIOS_DEBUG, "IPMI BMC POST is started\n");
+ return CB_SUCCESS;
+}
+
+enum cb_err ipmi_set_cmos_clear(void)
+{
+ int ret;
+
+ struct ipmi_oem_rsp {
+ struct ipmi_rsp resp;
+ struct boot_order data;
+ } __packed;
+
+ struct ipmi_oem_rsp rsp;
+ struct boot_order req;
+
+ /* IPMI OEM get bios boot order command to check if the valid bit and
+ the CMOS clear bit are both set from the response BootMode byte. */
+ ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
+ IPMI_OEM_GET_BIOS_BOOT_ORDER,
+ NULL, 0,
+ (unsigned char *) &rsp, sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (read ret=%d resp=0x%x)\n",
+ __func__, ret, rsp.resp.completion_code);
+ return CB_ERR;
+ }
+
+ if (!IS_CMOS_AND_VALID_BIT(rsp.data.boot_mode)) {
+ req = rsp.data;
+ SET_CMOS_AND_VALID_BIT(req.boot_mode);
+ ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
+ IPMI_OEM_SET_BIOS_BOOT_ORDER,
+ (const unsigned char *) &req, sizeof(req),
+ (unsigned char *) &rsp, sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (sent ret=%d resp=0x%x)\n",
+ __func__, ret, rsp.resp.completion_code);
+ return CB_ERR;
+ }
+
+ printk(BIOS_INFO, "IPMI CMOS clear requested because CMOS data is invalid.\n");
+
+ return CB_SUCCESS;
+ }
+
+ return CB_SUCCESS;
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-21 20:35:06 +0000