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-rw-r--r--src/drivers/intel/gma/i915_reg.h6
-rw-r--r--src/drivers/intel/gma/opregion.c2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h
index ae774a549e..e0bf1427c5 100644
--- a/src/drivers/intel/gma/i915_reg.h
+++ b/src/drivers/intel/gma/i915_reg.h
@@ -609,7 +609,7 @@
#define LM_FIFO_WATERMARK 0x0000001F
#define MI_ARB_STATE 0x020e4 /* 915+ only */
-/* Make render/texture TLB fetches lower priorty than associated data
+/* Make render/texture TLB fetches lower priority than associated data
* fetches. This is not turned on by default
*/
#define MI_ARB_RENDER_TLB_LOW_PRIORITY (1 << 15)
@@ -1636,9 +1636,9 @@
#define BLM_PIPE_C (2 << 29) /* ivb + */
#define BLM_PIPE(pipe) ((pipe) << 29)
#define BLM_POLARITY_I965 (1 << 28) /* gen4 only */
-#define BLM_PHASE_IN_INTERUPT_STATUS (1 << 26)
+#define BLM_PHASE_IN_INTERRUPT_STATUS (1 << 26)
#define BLM_PHASE_IN_ENABLE (1 << 25)
-#define BLM_PHASE_IN_INTERUPT_ENABL (1 << 24)
+#define BLM_PHASE_IN_INTERRUPT_ENABL (1 << 24)
#define BLM_PHASE_IN_TIME_BASE_SHIFT (16)
#define BLM_PHASE_IN_TIME_BASE_MASK (0xff << 16)
#define BLM_PHASE_IN_COUNT_SHIFT (8)
diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c
index 70cbccc876..5def085908 100644
--- a/src/drivers/intel/gma/opregion.c
+++ b/src/drivers/intel/gma/opregion.c
@@ -318,7 +318,7 @@ intel_gma_init_igd_opregion(igd_opregion_t *opregion)
opregion->header.size = sizeof(igd_opregion_t) / 1024;
/*
- * Left-shift version field to accomodate Intel Windows driver quirk
+ * Left-shift version field to accommodate Intel Windows driver quirk
* when not using a VBIOS.
* Required for Legacy boot + NGI, UEFI + NGI, and UEFI + GOP driver.
*