diff options
Diffstat (limited to 'src/drivers/intel/gma/i915_reg.h')
| -rw-r--r-- | src/drivers/intel/gma/i915_reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index cbb0628856..2ee5748e75 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -1672,6 +1672,7 @@ /* New registers for PCH-split platforms. Safe where new bits show up, the * register layout machtes with gen4 BLC_PWM_CTL[12]. */ #define BLC_PWM_CPU_CTL2 0x48250 +#define BLC_PWM2_ENABLE (1<<31) #define BLC_PWM_CPU_CTL 0x48254 #define BLM_HIST_CTL 0x48260 @@ -2978,6 +2979,7 @@ /* Ironlake */ #define CPU_VGACNTRL 0x41000 +#define CPU_VGA_DISABLE (1<<31) #define DIGITAL_PORT_HOTPLUG_CNTRL 0x44030 #define DIGITAL_PORTA_HOTPLUG_ENABLE (1 << 4) @@ -4391,4 +4393,8 @@ #define WM_DBG_DISALLOW_MAXFIFO (1<<1) #define WM_DBG_DISALLOW_SPRITE (1<<2) +/* North Display Engine Reset Warn Options */ +#define NDE_RSTWRN_OPT 0x46408 +#define RST_PCH_HNDSHK_EN (1<<4) + #endif /* _I915_REG_H_ */ |