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-rw-r--r--src/drivers/intel/fsp2_0/ppi/Kconfig24
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diff --git a/src/drivers/intel/fsp2_0/ppi/Kconfig b/src/drivers/intel/fsp2_0/ppi/Kconfig
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+++ b/src/drivers/intel/fsp2_0/ppi/Kconfig
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+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2019 Intel Corp.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+config FSP_USES_MP_SERVICES_PPI
+ bool
+ default n
+ depends on SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
+ help
+ This option allows SoC user to create MP service PPI for Intel
+ FSP usage, coreboot will provide EFI_PEI_MP_SERVICES_PPI structure
+ definitions along with all APIs as per EDK2 specification. Intel FSP
+ will use this PPI to run CPU feature programming on APs.