diff options
Diffstat (limited to 'src/drivers/intel/fsp2_0/Kconfig')
| -rw-r--r-- | src/drivers/intel/fsp2_0/Kconfig | 22 |
1 files changed, 7 insertions, 15 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 14d97426c2..285bedf8b7 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -31,6 +31,13 @@ config PLATFORM_USES_FSP2_2 if PLATFORM_USES_FSP2_0 +config PLATFORM_USES_FSP2_X86_32 + bool + default y + help + The FSP 2.0 runs in x86_32 protected mode. + Once there's a x86_64 FSP this needs to default to n. + config HAVE_INTEL_FSP_REPO bool help @@ -173,16 +180,6 @@ config FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS This allows deployed systems to bump their version number with the same FSP which will trigger a retrain of the memory. -config FSP_PEIM_TO_PEIM_INTERFACE - bool - select FSP_USES_MP_SERVICES_PPI - help - This option allows SOC user to create specific PPI for Intel FSP - usage, coreboot will provide required PPI structure definitions - along with all APIs as per EFI specification. So far this feature - is limited till EFI_PEI_MP_SERVICE_PPI and this option might be - useful to add further PPI if required. - config HAVE_FSP_LOGO_SUPPORT bool default n @@ -271,9 +268,4 @@ config SOC_INTEL_COMMON_FSP_RESET Common code block to handle platform reset request raised by FSP. The FSP will use the FSP EAS v2.0 section 12.2.2 (OEM Status Code) to indicate that a reset is required. - -if FSP_PEIM_TO_PEIM_INTERFACE -source "src/drivers/intel/fsp2_0/ppi/Kconfig" -endif - endif |