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Diffstat (limited to 'src/drivers/intel/fsp1_1')
-rw-r--r--src/drivers/intel/fsp1_1/after_raminit.S2
-rw-r--r--src/drivers/intel/fsp1_1/car.c4
-rw-r--r--src/drivers/intel/fsp1_1/include/fsp/ramstage.h1
-rw-r--r--src/drivers/intel/fsp1_1/include/fsp/romstage.h1
-rw-r--r--src/drivers/intel/fsp1_1/stack.c4
5 files changed, 5 insertions, 7 deletions
diff --git a/src/drivers/intel/fsp1_1/after_raminit.S b/src/drivers/intel/fsp1_1/after_raminit.S
index cd56ea8dc3..cdc8e9381f 100644
--- a/src/drivers/intel/fsp1_1/after_raminit.S
+++ b/src/drivers/intel/fsp1_1/after_raminit.S
@@ -66,7 +66,7 @@
1:
#endif
/* Display the MTRRs */
- call soc_display_mtrrs
+ call display_mtrrs
/*
* The stack contents are initialized in src/soc/intel/common/stack.c
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c
index 4016ba1a8e..13161d66d5 100644
--- a/src/drivers/intel/fsp1_1/car.c
+++ b/src/drivers/intel/fsp1_1/car.c
@@ -15,10 +15,10 @@
#include <arch/early_variables.h>
#include <console/console.h>
+#include <cpu/x86/mtrr.h>
#include <fsp/car.h>
#include <fsp/util.h>
#include <program_loading.h>
-#include <soc/intel/common/util.h>
#include <timestamp.h>
FSP_INFO_HEADER *fih_car CAR_GLOBAL;
@@ -95,7 +95,7 @@ asmlinkage void after_cache_as_ram(void *chipset_context)
{
timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END);
printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n");
- soc_display_mtrrs();
+ display_mtrrs();
after_cache_as_ram_stage();
}
diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
index a9f6a8db22..13769b3b2d 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
@@ -18,7 +18,6 @@
#define _INTEL_COMMON_RAMSTAGE_H_
#include <fsp/util.h>
-#include <soc/intel/common/util.h>
#include <stdint.h>
/*
diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h
index d79be7089c..e266beec60 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h
@@ -22,7 +22,6 @@
#include <memory_info.h>
#include <fsp/car.h>
#include <fsp/util.h>
-#include <soc/intel/common/util.h>
#include <soc/intel/common/mma.h>
#include <soc/pei_wrapper.h>
#include <soc/pm.h> /* chip_power_state */
diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c
index 06c0e63faa..eb2a6371a8 100644
--- a/src/drivers/intel/fsp1_1/stack.c
+++ b/src/drivers/intel/fsp1_1/stack.c
@@ -38,12 +38,12 @@ void *setup_stack_and_mtrrs(void)
uint32_t *slot;
/* Display the MTRRs */
- soc_display_mtrrs();
+ display_mtrrs();
/* Top of stack needs to be aligned to a 8-byte boundary. */
slot = (void *)romstage_ram_stack_top();
num_mtrrs = 0;
- max_mtrrs = soc_get_variable_mtrr_count(NULL);
+ max_mtrrs = get_var_mtrr_count();
/*
* The upper bits of the MTRR mask need to set according to the number