diff options
Diffstat (limited to 'src/drivers/intel/fsp1_1/romstage_after_verstage.S')
| -rw-r--r-- | src/drivers/intel/fsp1_1/romstage_after_verstage.S | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/src/drivers/intel/fsp1_1/romstage_after_verstage.S b/src/drivers/intel/fsp1_1/romstage_after_verstage.S deleted file mode 100644 index 2a3372f905..0000000000 --- a/src/drivers/intel/fsp1_1/romstage_after_verstage.S +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */ - -.text -.global car_stage_entry -car_stage_entry: - call romstage_after_verstage - #include "after_raminit.S" - - movb $0x69, %ah - jmp .Lhlt - -.Lhlt: - xchg %al, %ah -#if IS_ENABLED(CONFIG_POST_IO) - outb %al, $CONFIG_POST_IO_PORT -#else - post_code(POST_DEAD_CODE) -#endif - movl $LHLT_DELAY, %ecx -.Lhlt_Delay: - outb %al, $0xED - loop .Lhlt_Delay - jmp .Lhlt |