diff options
Diffstat (limited to 'src/drivers/intel/fsp1_1/include/fsp/ramstage.h')
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/ramstage.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h index 0a6295edc5..f925088e00 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h @@ -6,12 +6,6 @@ #include <fsp/util.h> #include <stdint.h> -/* - * Load FSP from stage cache or CBFS. This allows SoCs to load FSP separately - * from calling silicon init. It might be required in cases where stage cache is - * no longer available by the point SoC calls into silicon init. - */ -void fsp_load(void); /* Perform Intel silicon init. */ void intel_silicon_init(void); void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup); |