aboutsummaryrefslogtreecommitdiff
path: root/src/drivers/intel/fsp1_1/cache_as_ram.inc
diff options
context:
space:
mode:
Diffstat (limited to 'src/drivers/intel/fsp1_1/cache_as_ram.inc')
-rw-r--r--src/drivers/intel/fsp1_1/cache_as_ram.inc19
1 files changed, 12 insertions, 7 deletions
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index 35abdb48da..6e7e50b992 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -33,17 +33,22 @@
* mm0: low 32-bits of TSC value
* mm1: high 32-bits of TSC value
*/
-
- mov %eax, %edi
-
+ movl %eax, %edi
cache_as_ram:
post_code(0x20)
+#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
+
/*
- * edi: BIST value
- * mm0: low 32-bits of TSC value
- * mm1: high 32-bits of TSC value
+ * SOC specific setup
+ * NOTE: This has to preserve the registers
+ * mm0, mm1 and edi.
*/
+ #include <soc/car_setup.S>
+
+ post_code(0x28)
+
+#endif
/*
* Find the FSP binary in cbfs.
@@ -143,7 +148,7 @@ CAR_init_done:
rep stosl
before_romstage:
- post_code(0x23)
+ post_code(0x2A)
/* Call cache_as_ram_main(struct cache_as_ram_params *) */
call cache_as_ram_main