diff options
Diffstat (limited to 'src/drivers/intel/fsp1_0')
| -rw-r--r-- | src/drivers/intel/fsp1_0/Kconfig | 11 | ||||
| -rw-r--r-- | src/drivers/intel/fsp1_0/Makefile.inc | 2 |
2 files changed, 1 insertions, 12 deletions
diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig index 020235aab8..8d3bf4c901 100644 --- a/src/drivers/intel/fsp1_0/Kconfig +++ b/src/drivers/intel/fsp1_0/Kconfig @@ -82,17 +82,6 @@ config MRC_CACHE_SIZE should be a full sector of the flash ROM chip and nothing else should be included in CBFS in any sector that the fast boot cache data is in. -config MRC_CACHE_LOC - hex "Fast Boot Data Cache location in CBFS" - default 0xfff50000 - depends on ENABLE_MRC_CACHE - help - The location in CBFS for the MRC data to be cached. - - WARNING: This should be on a sector boundary of the BIOS ROM chip - and nothing else should be included in that sector, or IT WILL BE - ERASED. - config VIRTUAL_ROM_SIZE hex "Virtual ROM Size" default ROM_SIZE diff --git a/src/drivers/intel/fsp1_0/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc index ddc6bef926..11ff31aada 100644 --- a/src/drivers/intel/fsp1_0/Makefile.inc +++ b/src/drivers/intel/fsp1_0/Makefile.inc @@ -42,6 +42,6 @@ $(obj)/mrc.cache: cbfs-files-y += mrc.cache mrc.cache-file := $(obj)/mrc.cache -mrc.cache-position := $(CONFIG_MRC_CACHE_LOC) +mrc.cache-align := 0x10000 mrc.cache-type := mrc_cache endif |