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-rw-r--r--src/cpu/amd/agesa/Kconfig4
-rw-r--r--src/cpu/amd/pi/Kconfig4
-rw-r--r--src/cpu/intel/slot_1/Kconfig3
-rw-r--r--src/cpu/intel/socket_441/Kconfig4
-rw-r--r--src/cpu/intel/socket_m/Kconfig4
5 files changed, 1 insertions, 18 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index b144fc1ca1..51b61a19be 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -37,10 +37,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
-config C_ENV_BOOTBLOCK_SIZE
- hex
- default 0x8000
-
config ENABLE_MRC_CACHE
bool "Use cached memory configuration"
default n
diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig
index d3a94a8c21..7b214f7aa0 100644
--- a/src/cpu/amd/pi/Kconfig
+++ b/src/cpu/amd/pi/Kconfig
@@ -36,10 +36,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
-config C_ENV_BOOTBLOCK_SIZE
- hex
- default 0x8000
-
endif # CPU_AMD_PI
source "src/cpu/amd/pi/00630F01/Kconfig"
diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig
index 2b6deb6673..aafe110785 100644
--- a/src/cpu/intel/slot_1/Kconfig
+++ b/src/cpu/intel/slot_1/Kconfig
@@ -32,7 +32,6 @@ config DCACHE_BSP_STACK_SIZE
config C_ENV_BOOTBLOCK_SIZE
hex
- default 0x4000 if BOOTBLOCK_CONSOLE
- default 0x2000
+ default 0x10000
endif
diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig
index 7a303af08c..1b930de047 100644
--- a/src/cpu/intel/socket_441/Kconfig
+++ b/src/cpu/intel/socket_441/Kconfig
@@ -10,10 +10,6 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
select SSE
select SETUP_XIP_CACHE
-config C_ENV_BOOTBLOCK_SIZE
- hex
- default 0x8000
-
config DCACHE_RAM_BASE
hex
default 0xfefc0000
diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig
index 8b1f5edda5..32eedb6ef0 100644
--- a/src/cpu/intel/socket_m/Kconfig
+++ b/src/cpu/intel/socket_m/Kconfig
@@ -22,8 +22,4 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
-config C_ENV_BOOTBLOCK_SIZE
- hex
- default 0x8000
-
endif