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-rw-r--r--src/cpu/intel/car/romstage.c3
-rw-r--r--src/cpu/intel/haswell/romstage.c3
2 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 2daf47b29b..264ad4ab7f 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -17,6 +17,7 @@
#include <cpu/x86/mtrr.h>
#include <arch/symbols.h>
#include <program_loading.h>
+#include <timestamp.h>
#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
@@ -59,6 +60,8 @@ static void romstage_main(unsigned long bist)
*/
asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
{
+ timestamp_init(base_timestamp);
+ timestamp_add_now(TS_START_ROMSTAGE);
romstage_main(bist);
}
#endif
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 688f3579db..ff729d6285 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -77,9 +77,6 @@ void romstage_common(const struct romstage_params *params)
int boot_mode;
int wake_from_s3;
- timestamp_init(get_initial_timestamp());
- timestamp_add_now(TS_START_ROMSTAGE);
-
if (params->bist == 0)
enable_lapic();