diff options
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 4 | ||||
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 36 |
2 files changed, 7 insertions, 33 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index a55b2dcc98..6c819a8c46 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -94,8 +94,8 @@ int var_mtrr_set(struct var_mtrr_context *ctx, uintptr_t addr, size_t size, int return -1; } - addr_lsb = fls(addr); - size_msb = fms(size); + addr_lsb = __ffs(addr); + size_msb = __fls(size); /* All MTRR entries need to have their base aligned to the mask size. The maximum size is calculated by a function of the diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index f467145074..f3a9025d53 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -20,6 +20,7 @@ #include <cpu/x86/mtrr.h> #include <device/device.h> #include <device/pci_ids.h> +#include <lib.h> #include <memrange.h> #include <string.h> #include <types.h> @@ -443,33 +444,6 @@ static void prep_var_mtrr(struct var_mtrr_state *var_state, regs->mask.hi = rsize >> 32; } -/* - * fls64: find least significant bit set in a 64-bit word - * As samples, fls64(0x0) = 64; fls64(0x4400) = 10; - * fls64(0x40400000000) = 34. - */ -static uint32_t fls64(uint64_t x) -{ - uint32_t lo = (uint32_t)x; - if (lo) - return fls(lo); - uint32_t hi = x >> 32; - return fls(hi) + 32; -} - -/* - * fms64: find most significant bit set in a 64-bit word - * As samples, fms64(0x0) = 0; fms64(0x4400) = 14; - * fms64(0x40400000000) = 42. - */ -static uint32_t fms64(uint64_t x) -{ - uint32_t hi = (uint32_t)(x >> 32); - if (!hi) - return fms((uint32_t)x); - return fms(hi) + 32; -} - static void calc_var_mtrr_range(struct var_mtrr_state *var_state, uint64_t base, uint64_t size, int mtrr_type) { @@ -478,8 +452,8 @@ static void calc_var_mtrr_range(struct var_mtrr_state *var_state, uint32_t size_msb; uint64_t mtrr_size; - addr_lsb = fls64(base); - size_msb = fms64(size); + addr_lsb = __ffs64(base); + size_msb = __fls64(size); /* All MTRR entries need to have their base aligned to the mask * size. The maximum size is calculated by a function of the @@ -532,7 +506,7 @@ static uint64_t optimize_var_mtrr_hole(const uint64_t base, best_count = var_state.mtrr_index; var_state.mtrr_index = 0; - for (align = fls(hole) + 1; align <= fms(hole); ++align) { + for (align = __ffs(hole) + 1; align <= __fls(hole); ++align) { const uint64_t hole_end = ALIGN_UP((uint64_t)hole, 1 << align); if (hole_end > limit) break; @@ -624,7 +598,7 @@ static void calc_var_mtrrs_with_hole(struct var_mtrr_state *var_state, */ next = memranges_next_entry(var_state->addr_space, r); if (next == NULL) { - b2_limit = ALIGN_UP((uint64_t)b1, 1 << fms(b1)); + b2_limit = ALIGN_UP((uint64_t)b1, 1 << __fls(b1)); /* If it's the last range above 4GiB, we won't carve the hole out. If an OS wanted to move MMIO there, it would have to override the MTRR setting using |