diff options
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/agesa/Kconfig | 6 | ||||
| -rw-r--r-- | src/cpu/x86/Kconfig | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index e982a83770..fcba0cfdb2 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -46,10 +46,10 @@ config XIP_ROM_SIZE default 0x100000 help Overwride the default write through caching size as 1M Bytes. - On some AMD paltform, one socket support 2 or more kinds of - processor family, compiling several cpu families agesa code + On some AMD platforms, one socket supports 2 or more kinds of + processor family, compiling several CPU families agesa code will increase the romstage size. - In order to execute romstage in place on the flash rom, + In order to execute romstage in place on the flash ROM, more space is required to be set as write through caching. config UDELAY_LAPIC_FIXED_FSB diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 7689d59ae0..a1ec208140 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -126,7 +126,7 @@ config PARALLEL_MP config BACKUP_DEFAULT_SMM_REGION def_bool n help - The cpu support will select this option if the default SMM region + The CPU support will select this option if the default SMM region needs to be backed up for suspend/resume purposes. config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING @@ -135,5 +135,5 @@ config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING On certain platforms a boot speed gain can be realized if mirroring the payload data stored in non-volatile storage. On x86 systems the payload would typically live in a memory-mapped SPI part. Copying - the SPI contents to ram before performing the load can speed up + the SPI contents to RAM before performing the load can speed up the boot process. |