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-rw-r--r--src/cpu/amd/pi/00630F01/fixme.c6
-rw-r--r--src/cpu/amd/pi/00660F01/fixme.c6
-rw-r--r--src/cpu/amd/pi/00730F01/fixme.c6
3 files changed, 0 insertions, 18 deletions
diff --git a/src/cpu/amd/pi/00630F01/fixme.c b/src/cpu/amd/pi/00630F01/fixme.c
index 12f8062dfa..d94215a44b 100644
--- a/src/cpu/amd/pi/00630F01/fixme.c
+++ b/src/cpu/amd/pi/00630F01/fixme.c
@@ -85,10 +85,4 @@ void amd_initmmio(void)
LibAmdMsrWrite(MTRR_PHYS_BASE(6), &MsrReg, &StdHeader);
MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
-
- if (CONFIG(UDELAY_LAPIC)){
- LibAmdMsrRead(0x1B, &MsrReg, &StdHeader);
- MsrReg |= 1 << 11;
- LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader);
- }
}
diff --git a/src/cpu/amd/pi/00660F01/fixme.c b/src/cpu/amd/pi/00660F01/fixme.c
index 237d52b2c1..7d71e2ea1a 100644
--- a/src/cpu/amd/pi/00660F01/fixme.c
+++ b/src/cpu/amd/pi/00660F01/fixme.c
@@ -91,10 +91,4 @@ void amd_initmmio(void)
LibAmdMsrWrite(MTRR_PHYS_BASE(6), &MsrReg, &StdHeader);
MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
-
- if (CONFIG(UDELAY_LAPIC)) {
- LibAmdMsrRead(0x1B, &MsrReg, &StdHeader);
- MsrReg |= 1 << 11;
- LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader);
- }
}
diff --git a/src/cpu/amd/pi/00730F01/fixme.c b/src/cpu/amd/pi/00730F01/fixme.c
index a0621cbb7f..7edd1b8fa2 100644
--- a/src/cpu/amd/pi/00730F01/fixme.c
+++ b/src/cpu/amd/pi/00730F01/fixme.c
@@ -96,10 +96,4 @@ void amd_initmmio(void)
LibAmdMsrWrite(MTRR_PHYS_BASE(6), &MsrReg, &StdHeader);
MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
-
- if (CONFIG(UDELAY_LAPIC)) {
- LibAmdMsrRead(0x1B, &MsrReg, &StdHeader);
- MsrReg |= 1 << 11;
- LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader);
- }
}