diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/agesa/family14/model_14_init.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/agesa/family15tn/model_15_init.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/agesa/family16kb/model_16_init.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/pi/00730F01/model_16_init.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 4 | ||||
-rw-r--r-- | src/cpu/intel/model_2065x/model_2065x_init.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 2 |
7 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index 1bcbc34904..76c8521761 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -63,7 +63,7 @@ static void model_14_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); /* Enable the local CPU APICs */ setup_lapic(); diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index c7fcb36c20..883bd59228 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -62,7 +62,7 @@ static void model_15_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); /* Enable the local CPU APICs */ setup_lapic(); diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 28c3e78900..f945f80ce1 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -60,7 +60,7 @@ static void model_16_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); /* Enable the local CPU APICs */ setup_lapic(); diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c index 7266a2cc61..3c78c095d0 100644 --- a/src/cpu/amd/pi/00730F01/model_16_init.c +++ b/src/cpu/amd/pi/00730F01/model_16_init.c @@ -45,7 +45,7 @@ static void model_16_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); /* Enable the local CPU APICs */ setup_lapic(); diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 9fcb527a16..2d8bd152d7 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -528,14 +528,14 @@ static void configure_mca(void) /* Enable all error reporting */ msr.lo = msr.hi = ~0; for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_CTL + (i * 4), msr); + wrmsr(IA32_MC_CTL(i), msr); msr.lo = msr.hi = 0; /* TODO(adurbin): This should only be done on a cold boot. Also, some * of these banks are core vs package scope. For now every CPU clears * every bank. */ for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); } /* All CPUs including BSP will run the following function. */ diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index dd2aeef135..abf8f610b9 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -81,7 +81,7 @@ static void configure_mca(void) msr.lo = msr.hi = 0; /* This should only be done on a cold boot */ for (i = 0; i < 7; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); } static void model_2065x_init(struct device *cpu) diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 7a40644a6f..bfe1fa57dc 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -309,7 +309,7 @@ static void configure_mca(void) msr.lo = msr.hi = 0; /* This should only be done on a cold boot */ for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC_STATUS(i), msr); } static void model_206ax_report(void) |