diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/car/cache_as_ram.inc | 8 | ||||
-rw-r--r-- | src/cpu/amd/microcode/microcode.c | 3 |
2 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 7cbf1dbcbb..e4c2704727 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -415,26 +415,26 @@ fam10_mtrr_setup_complete: jmp_if_not_fam15h(fam15_car_msr_setup_complete) /* Disable streaming store (DisSS = 1) */ - mov $0xc0011020, %ecx + mov $LS_CFG_MSR, %ecx rdmsr bts $28, %eax wrmsr /* Disable speculative ITLB reloads (DisSpecTlbRld = 1) */ - mov $0xc0011021, %ecx + mov $IC_CFG_MSR, %ecx rdmsr bts $9, %eax wrmsr /* Disable speculative DTLB reloads (DisSpecTlbRld = 1) and set DisHwPf = 1 */ - mov $0xc0011022, %ecx + mov $DC_CFG_MSR, %ecx rdmsr bts $4, %eax bts $13, %eax wrmsr /* Disable CR0 combining (CombineCr0Cd = 0) */ - mov $0xc001102b, %ecx + mov $BU_CFG3_MSR, %ecx rdmsr btr $49-32, %edx wrmsr diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c index 68b6953be8..29a550d529 100644 --- a/src/cpu/amd/microcode/microcode.c +++ b/src/cpu/amd/microcode/microcode.c @@ -17,6 +17,7 @@ #include <stdint.h> #include <console/console.h> #include <cpu/x86/msr.h> +#include <cpu/amd/msr.h> #include <cpu/amd/microcode.h> #include <cbfs.h> #include <arch/io.h> @@ -121,7 +122,7 @@ static void apply_microcode_patch(const struct microcode *m) msr.hi = 0; msr.lo = (uint32_t)m; - wrmsr(0xc0010020, msr); + wrmsr(MSR_PATCH_LOADER, msr); UCODE_DEBUG("patch id to apply = 0x%08x\n", m->patch_id); |