3 files changed, 15 insertions, 2 deletions
diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig
index 1805e6a294..bfabfb8471 100644
--- a/src/cpu/intel/socket_PGA370/Kconfig
+++ b/src/cpu/intel/socket_PGA370/Kconfig
@@ -21,10 +21,22 @@ config CPU_INTEL_SOCKET_PGA370
 	bool
 	select MMX
 	select UDELAY_TSC
+	select CACHE_AS_RAM
+
+if CPU_INTEL_SOCKET_PGA370
 
 # Not all CPUs for Socket 370 can do SSE2
 config SSE2
 	bool
 	default n
-	depends on CPU_INTEL_SOCKET_PGA370
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc0000
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x01000
+
+endif
 
diff --git a/src/cpu/intel/socket_PGA370/Makefile.inc b/src/cpu/intel/socket_PGA370/Makefile.inc
index c857bcee45..8e590506e6 100644
--- a/src/cpu/intel/socket_PGA370/Makefile.inc
+++ b/src/cpu/intel/socket_PGA370/Makefile.inc
@@ -27,3 +27,5 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 
+cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+
diff --git a/src/cpu/intel/socket_PGA370/socket_PGA370.c b/src/cpu/intel/socket_PGA370/socket_PGA370.c
index 1fc62ba760..fffd983a41 100644
--- a/src/cpu/intel/socket_PGA370/socket_PGA370.c
+++ b/src/cpu/intel/socket_PGA370/socket_PGA370.c
@@ -1,7 +1,6 @@
 #include <device/device.h>
 #include "chip.h"
 
-
 struct chip_operations cpu_intel_socket_PGA370_ops = {
 	CHIP_NAME("Socket PGA370 CPU")
 };