aboutsummaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/geode_lx/cache_as_ram.inc32
1 files changed, 16 insertions, 16 deletions
diff --git a/src/cpu/amd/geode_lx/cache_as_ram.inc b/src/cpu/amd/geode_lx/cache_as_ram.inc
index 45fd16691b..db95deefb3 100644
--- a/src/cpu/amd/geode_lx/cache_as_ram.inc
+++ b/src/cpu/amd/geode_lx/cache_as_ram.inc
@@ -189,24 +189,25 @@ DCacheSetupGood:
call main
done_cache_as_ram_main:
- /* We now run over the stack-in-cache, copying it back to itself to invalidate the cache */
-
- push %edi
- mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
- push %esi
- mov $(CONFIG_DCACHE_RAM_BASE),%edi
- mov %edi,%esi
- cld
- rep movsl %ds:(%esi),%es:(%edi)
- pop %esi
- pop %edi
+ /* We now run over the stack-in-cache,
+ * copying it back to itself to invalidate the cache */
+
+ push %edi
+ mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
+ push %esi
+ mov $(CONFIG_DCACHE_RAM_BASE),%edi
+ mov %edi,%esi
+ cld
+ rep movsl %ds:(%esi),%es:(%edi)
+ pop %esi
+ pop %edi
/* Clear the cache out to ram */
wbinvd
- /* re-enable the cache */
- movl %cr0, %eax
- xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
- movl %eax, %cr0
+ /* re-enable the cache */
+ movl %cr0, %eax
+ xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
+ movl %eax, %cr0
__main:
post_code(POST_PREPARE_RAMSTAGE)
@@ -227,4 +228,3 @@ __main:
post_code(POST_DEAD_CODE)
hlt
jmp .Lhlt
-