3 files changed, 9 insertions, 3 deletions
diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c
index 4c2e826526..f2605ebd79 100644
--- a/src/cpu/intel/model_69x/model_69x_init.c
+++ b/src/cpu/intel/model_69x/model_69x_init.c
@@ -38,7 +38,8 @@ static struct device_operations cpu_dev_ops = {
 	.init     = model_69x_init,
 };
 static struct cpu_device_id cpu_table[] = {
-	{ X86_VENDOR_INTEL, 0x0695 }, /* Pentium M */
+	{ X86_VENDOR_INTEL, 0x0690 }, /* Pentium M */
+	{ X86_VENDOR_INTEL, 0x0695 },
 	{ 0, 0 },
 };
 
diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c
index 9319c64d81..936c67afc9 100644
--- a/src/cpu/intel/model_6dx/model_6dx_init.c
+++ b/src/cpu/intel/model_6dx/model_6dx_init.c
@@ -38,6 +38,7 @@ static struct device_operations cpu_dev_ops = {
 	.init     = model_6dx_init,
 };
 static struct cpu_device_id cpu_table[] = {
+	{ X86_VENDOR_INTEL, 0x06D0 }, /* Pentium M on 90nm with 2MiB of L2 cache */
 	{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
 	{ 0, 0 },
 };
diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index df814c8467..2f50e46695 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -44,17 +44,21 @@ static struct device_operations cpu_dev_ops = {
 	.init     = model_6xx_init,
 };
 static struct cpu_device_id cpu_table[] = {
+	{ X86_VENDOR_INTEL, 0x0650 },
 	{ X86_VENDOR_INTEL, 0x0652 },
-	{ X86_VENDOR_INTEL, 0x0665 }, /* Celeron (Mendocino) */
+	{ X86_VENDOR_INTEL, 0x0660 }, /* Celeron (Mendocino) */
+	{ X86_VENDOR_INTEL, 0x0665 },
 	{ X86_VENDOR_INTEL, 0x0672 },
 	{ X86_VENDOR_INTEL, 0x0673 },
+	{ X86_VENDOR_INTEL, 0x0680 },
 	{ X86_VENDOR_INTEL, 0x0681 },
 	{ X86_VENDOR_INTEL, 0x0683 },
 	{ X86_VENDOR_INTEL, 0x0686 },
 	{ X86_VENDOR_INTEL, 0x06A0 },
 	{ X86_VENDOR_INTEL, 0x06A1 },
 	{ X86_VENDOR_INTEL, 0x06A4 },
-	{ X86_VENDOR_INTEL, 0x06B4 }, /* Mobile Celeron FCBGA */
+	{ X86_VENDOR_INTEL, 0x06B0 }, /* Mobile Celeron FCBGA */
+	{ X86_VENDOR_INTEL, 0x06B4 },
 	{ 0, 0 },
 };