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-rw-r--r--src/cpu/amd/family_10h-family_15h/init_cpus.c18
-rw-r--r--src/cpu/amd/family_10h-family_15h/model_10xxx_init.c22
2 files changed, 38 insertions, 2 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 14d8642083..530ffd2c6f 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -347,9 +347,11 @@ static void STOP_CAR_AND_CPU(uint8_t skip_sharedc_config, uint32_t apicid)
static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
{
- u32 bsp_apicid = 0;
- u32 apicid;
+ uint32_t bsp_apicid = 0;
+ uint32_t apicid;
+ uint32_t dword;
uint8_t set_mtrrs;
+ uint8_t node_count;
struct node_core_id id;
/* Please refer to the calculations and explaination in cache_as_ram.inc before modifying these values */
@@ -441,6 +443,18 @@ static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
cpuSetAMDMSR(id.nodeid);
+ /* Set up HyperTransport probe filter support */
+ if (is_gt_rev_d()) {
+ dword = pci_read_config32(NODE_PCI(id.nodeid, 0), 0x60);
+ node_count = ((dword >> 4) & 0x7) + 1;
+
+ if (node_count > 1) {
+ msr_t msr = rdmsr(BU_CFG2_MSR);
+ msr.hi |= 1 << (42 - 32);
+ wrmsr(BU_CFG2_MSR, msr);
+ }
+ }
+
#if CONFIG_SET_FIDVID
#if CONFIG_LOGICAL_CPUS && CONFIG_SET_FIDVID_CORE0_ONLY
// Run on all AP for proper FID/VID setup.
diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
index 3bda14c95a..fe9fb9cd0c 100644
--- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
+++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
@@ -50,6 +50,28 @@ static inline uint8_t is_fam15h(void)
return fam15h;
}
+static inline uint8_t is_gt_rev_d(void)
+{
+ uint8_t fam15h = 0;
+ uint8_t rev_gte_d = 0;
+ uint32_t family;
+ uint32_t model;
+
+ family = model = cpuid_eax(0x80000001);
+ model = ((model & 0xf0000) >> 12) | ((model & 0xf0) >> 4);
+ family = ((family & 0xf00000) >> 16) | ((family & 0xf00) >> 8);
+
+ if (family >= 0x6f)
+ /* Family 15h or later */
+ fam15h = 1;
+
+ if ((model >= 0x8) || fam15h)
+ /* Revision D or later */
+ rev_gte_d = 1;
+
+ return rev_gte_d;
+}
+
static volatile uint8_t fam15h_startup_flags[MAX_NODES_SUPPORTED][MAX_CORES_SUPPORTED] = {{ 0 }};
static void model_10xxx_init(device_t dev)