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-rw-r--r--src/cpu/x86/16bit/entry16.inc2
-rw-r--r--src/cpu/x86/Kconfig2
-rw-r--r--src/cpu/x86/lapic/apic_timer.c2
-rw-r--r--src/cpu/x86/lapic/lapic.c8
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c4
-rw-r--r--src/cpu/x86/mp_init.c14
-rw-r--r--src/cpu/x86/smm/smm_module_loader.c2
-rw-r--r--src/cpu/x86/smm/smmrelocate.S2
8 files changed, 18 insertions, 18 deletions
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc
index b4db83400d..cf366e0af6 100644
--- a/src/cpu/x86/16bit/entry16.inc
+++ b/src/cpu/x86/16bit/entry16.inc
@@ -79,7 +79,7 @@ _start16bit:
*
* The criteria for relocation have been relaxed to their
* utmost, so that we can use the same code for both
- * our initial entry point and startup of the second cpu.
+ * our initial entry point and startup of the second CPU.
* The code assumes when executing at _start16bit that:
* (((cs & 0xfff) == 0) and (ip == _start16bit & 0xffff))
* or
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index c4507bc911..3e56d721f5 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -25,7 +25,7 @@ config LAPIC_MONOTONIC_TIMER
depends on UDELAY_LAPIC
select HAVE_MONOTONIC_TIMER
help
- Expose monotonic time using the local apic.
+ Expose monotonic time using the local APIC.
config UDELAY_LAPIC_FIXED_FSB
int
diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c
index b16521a56d..41edde913f 100644
--- a/src/cpu/x86/lapic/apic_timer.c
+++ b/src/cpu/x86/lapic/apic_timer.c
@@ -83,7 +83,7 @@ static inline u32 get_timer_fsb(void)
void init_timer(void)
{
- /* Set the apic timer to no interrupts and periodic mode */
+ /* Set the APIC timer to no interrupts and periodic mode */
lapic_write(LAPIC_LVTT, (LAPIC_LVT_TIMER_PERIODIC | LAPIC_LVT_MASKED));
/* Set the divider to 1, no divider */
diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 83a45b013c..f6cbe17992 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -17,9 +17,9 @@ void setup_lapic(void)
/* Only Pentium Pro and later have those MSR stuff */
msr_t msr;
- printk(BIOS_INFO, "Setting up local apic...");
+ printk(BIOS_INFO, "Setting up local APIC...");
- /* Enable the local apic */
+ /* Enable the local APIC */
msr = rdmsr(LAPIC_BASE_MSR);
msr.lo |= LAPIC_BASE_MSR_ENABLE;
msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
@@ -32,7 +32,7 @@ void setup_lapic(void)
lapic_write_around(LAPIC_TASKPRI,
lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
- /* Put the local apic in virtual wire mode */
+ /* Put the local APIC in virtual wire mode */
lapic_write_around(LAPIC_SPIV,
(lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
| LAPIC_SPIV_ENABLE);
@@ -61,7 +61,7 @@ void setup_lapic(void)
/* Only Pentium Pro and later have those MSR stuff */
msr_t msr;
- printk(BIOS_INFO, "Disabling local apic...");
+ printk(BIOS_INFO, "Disabling local APIC...");
msr = rdmsr(LAPIC_BASE_MSR);
msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index aaeceefe08..792ae7a8eb 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -165,7 +165,7 @@ static int lapic_start_cpu(unsigned long apicid)
send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
} while (send_status && (timeout++ < 1000));
if (timeout >= 1000) {
- printk(BIOS_ERR, "CPU %ld: Second apic write timed out. "
+ printk(BIOS_ERR, "CPU %ld: Second APIC write timed out. "
"Disabling\n", apicid);
// too bad.
return 0;
@@ -546,7 +546,7 @@ void initialize_cpus(struct bus *cpu_bus)
info = cpu_info();
#if NEED_LAPIC == 1
- /* Ensure the local apic is enabled */
+ /* Ensure the local APIC is enabled */
enable_lapic();
/* Get the device path of the boot CPU */
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index ff32015b58..baa3599a94 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -81,7 +81,7 @@ struct mp_params {
int num_cpus; /* Total cpus include BSP */
int parallel_microcode_load;
const void *microcode_pointer;
- /* adjust_apic_id() is called for every potential apic id in the
+ /* adjust_apic_id() is called for every potential APIC id in the
* system up from 0 to CONFIG_MAX_CPUS. Return adjusted apic_id. */
int (*adjust_apic_id)(int index, int apic_id);
/* Flight plan for APs and BSP. */
@@ -134,7 +134,7 @@ struct cpu_map {
int apic_id;
};
-/* Keep track of apic and device structure for each cpu. */
+/* Keep track of APIC and device structure for each CPU. */
static struct cpu_map cpus[CONFIG_MAX_CPUS];
static inline void barrier_wait(atomic_t *b)
@@ -192,7 +192,7 @@ static void asmlinkage ap_init(unsigned int cpu)
struct cpu_info *info;
int apic_id;
- /* Ensure the local apic is enabled */
+ /* Ensure the local APIC is enabled */
enable_lapic();
info = cpu_info();
@@ -546,14 +546,14 @@ static void init_bsp(struct bus *cpu_bus)
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- /* Ensure the local apic is enabled */
+ /* Ensure the local APIC is enabled */
enable_lapic();
- /* Set the device path of the boot cpu. */
+ /* Set the device path of the boot CPU. */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id = lapicid();
- /* Find the device structure for the boot cpu. */
+ /* Find the device structure for the boot CPU. */
info = cpu_info();
info->cpu = alloc_find_dev(cpu_bus, &cpu_path);
@@ -641,7 +641,7 @@ static void mp_initialize_cpu(void)
cpu_initialize(info->index);
}
-/* Returns apic id for coreboot CPU number or < 0 on failure. */
+/* Returns APIC id for coreboot CPU number or < 0 on failure. */
static int mp_get_apic_id(int cpu_slot)
{
if (cpu_slot >= CONFIG_MAX_CPUS || cpu_slot < 0)
diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c
index 09ddb037f8..139bce13ab 100644
--- a/src/cpu/x86/smm/smm_module_loader.c
+++ b/src/cpu/x86/smm/smm_module_loader.c
@@ -41,7 +41,7 @@ struct smm_stub_params {
/*
* The stub is the entry point that sets up protected mode and stacks for each
- * cpu. It then calls into the SMM handler module. It is encoded as an rmodule.
+ * CPU. It then calls into the SMM handler module. It is encoded as an rmodule.
*/
extern unsigned char _binary_smmstub_start[];
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 2502df8a56..2fe01565c4 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -125,7 +125,7 @@ smm_relocate:
shr $24, %ecx
/* calculate offset by multiplying the
- * apic ID by 1024 (0x400)
+ * APIC ID by 1024 (0x400)
*/
movl %ecx, %edx
shl $10, %edx