diff options
Diffstat (limited to 'src/cpu/x86/smm')
-rw-r--r-- | src/cpu/x86/smm/smmhandler.S | 8 | ||||
-rw-r--r-- | src/cpu/x86/smm/smmrelocate.S | 3 |
2 files changed, 10 insertions, 1 deletions
diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S index 774088e1f2..484b643017 100644 --- a/src/cpu/x86/smm/smmhandler.S +++ b/src/cpu/x86/smm/smmhandler.S @@ -105,6 +105,14 @@ smm_handler_start: movl (%esi), %ecx shr $24, %ecx + /* This is an ugly hack, and we should find a way to read the CPU index + * without relying on the LAPIC ID. + */ +#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) + /* LAPIC IDs start from 0x10; map that to the proper core index */ + subl $0x10, %ecx +#endif + /* calculate stack offset by multiplying the APIC ID * by 1024 (0x400), and save that offset in ebp. */ diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S index 71f74e757f..bdc977190b 100644 --- a/src/cpu/x86/smm/smmrelocate.S +++ b/src/cpu/x86/smm/smmrelocate.S @@ -23,7 +23,8 @@ #define __PRE_RAM__ /* On AMD's platforms we can set SMBASE by writing an MSR */ -#if !CONFIG_NORTHBRIDGE_AMD_AMDK8 && !CONFIG_NORTHBRIDGE_AMD_AMDFAM10 +#if !CONFIG_NORTHBRIDGE_AMD_AMDK8 && !CONFIG_NORTHBRIDGE_AMD_AMDFAM10 \ + && !CONFIG_CPU_AMD_AGESA_FAMILY15_TN // FIXME: Is this piece of code southbridge specific, or // can it be cleaned up so this include is not required? |