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-rw-r--r--src/cpu/x86/smm/smihandler.c14
-rw-r--r--src/cpu/x86/smm/smmhandler.S3
2 files changed, 12 insertions, 5 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 0e007335e5..19e53e677c 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -131,7 +131,10 @@ void smi_handler(u32 smm_revision)
*/
while (smi_handler_status == SMI_LOCKED) {
asm volatile (
- ".byte 0xf3, 0x90\n" /* hint a CPU we are in spinlock (PAUSE instruction, REP NOP) */
+ ".byte 0xf3, 0x90\n" /* hint a CPU we are in
+ * spinlock (PAUSE
+ * instruction, REP NOP)
+ */
);
}
return;
@@ -203,9 +206,12 @@ void smi_handler(u32 smm_revision)
* weak relocations w/o a symbol have a 0 address which is where the modules
* are linked at. */
int __attribute__((weak)) mainboard_io_trap_handler(int smif) { return 0; }
-void __attribute__((weak)) cpu_smi_handler(unsigned int node, smm_state_save_area_t *state_save) {}
-void __attribute__((weak)) northbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_save) {}
-void __attribute__((weak)) southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_save) {}
+void __attribute__((weak)) cpu_smi_handler(unsigned int node,
+ smm_state_save_area_t *state_save) {}
+void __attribute__((weak)) northbridge_smi_handler(unsigned int node,
+ smm_state_save_area_t *state_save) {}
+void __attribute__((weak)) southbridge_smi_handler(unsigned int node,
+ smm_state_save_area_t *state_save) {}
void __attribute__((weak)) mainboard_smi_gpi(u32 gpi_sts) {}
int __attribute__((weak)) mainboard_smi_apmc(u8 data) { return 0; }
void __attribute__((weak)) mainboard_smi_sleep(u8 slp_typ) {}
diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S
index a16b3ec110..dd8a0c0cbd 100644
--- a/src/cpu/x86/smm/smmhandler.S
+++ b/src/cpu/x86/smm/smmhandler.S
@@ -141,7 +141,8 @@ untampered_lapic:
/* This is an ugly hack, and we should find a way to read the CPU index
* without relying on the LAPIC ID.
*/
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL)
+#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) \
+ || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL)
/* LAPIC IDs start from 0x10; map that to the proper core index */
subl $0x10, %ecx
#endif