diff options
Diffstat (limited to 'src/cpu/x86/mtrr')
-rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 14 | ||||
-rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 38 |
2 files changed, 26 insertions, 26 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 9561d8dc99..2e31a6e113 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -13,10 +13,10 @@ void set_var_mtrr( msr_t basem, maskm; basem.lo = base | type; basem.hi = 0; - wrmsr(MTRRphysBase_MSR(reg), basem); - maskm.lo = ~(size - 1) | MTRRphysMaskValid; + wrmsr(MTRR_PHYS_BASE(reg), basem); + maskm.lo = ~(size - 1) | MTRR_PHYS_MASK_VALID; maskm.hi = (1 << (CONFIG_CPU_ADDR_BITS - 32)) - 1; - wrmsr(MTRRphysMask_MSR(reg), maskm); + wrmsr(MTRR_PHYS_MASK(reg), maskm); } #if !IS_ENABLED(CONFIG_CACHE_AS_RAM) @@ -36,7 +36,7 @@ const int addr_det = 0; static void do_early_mtrr_init(const unsigned long *mtrr_msrs) { /* Precondition: - * The cache is not enabled in cr0 nor in MTRRdefType_MSR + * The cache is not enabled in cr0 nor in MTRR_DEF_TYPE_MSR * entry32.inc ensures the cache is not enabled in cr0 */ msr_t msr; @@ -65,7 +65,7 @@ static void do_early_mtrr_init(const unsigned long *mtrr_msrs) /* Enable Variable MTRRs */ msr.hi = 0x00000000; msr.lo = 0x00000800; - wrmsr(MTRRdefType_MSR, msr); + wrmsr(MTRR_DEF_TYPE_MSR, msr); } @@ -99,7 +99,7 @@ static inline int early_mtrr_init_detected(void) * on both Intel and AMD cpus, at least * according to the documentation. */ - msr = rdmsr(MTRRdefType_MSR); - return msr.lo & MTRRdefTypeEn; + msr = rdmsr(MTRR_DEF_TYPE_MSR); + return msr.lo & MTRR_DEF_TYPE_EN; } #endif diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 1994a565ab..072b8877dc 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -64,7 +64,7 @@ static void detect_var_mtrrs(void) { msr_t msr; - msr = rdmsr(MTRRcap_MSR); + msr = rdmsr(MTRR_CAP_MSR); total_mtrrs = msr.lo & 0xff; @@ -81,19 +81,19 @@ void enable_fixed_mtrr(void) { msr_t msr; - msr = rdmsr(MTRRdefType_MSR); - msr.lo |= MTRRdefTypeEn | MTRRdefTypeFixEn; - wrmsr(MTRRdefType_MSR, msr); + msr = rdmsr(MTRR_DEF_TYPE_MSR); + msr.lo |= MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN; + wrmsr(MTRR_DEF_TYPE_MSR, msr); } static void enable_var_mtrr(unsigned char deftype) { msr_t msr; - msr = rdmsr(MTRRdefType_MSR); + msr = rdmsr(MTRR_DEF_TYPE_MSR); msr.lo &= ~0xff; - msr.lo |= MTRRdefTypeEn | deftype; - wrmsr(MTRRdefType_MSR, msr); + msr.lo |= MTRR_DEF_TYPE_EN | deftype; + wrmsr(MTRR_DEF_TYPE_MSR, msr); } /* fms: find most sigificant bit set, stolen from Linux Kernel Source. */ @@ -250,11 +250,11 @@ static uint8_t fixed_mtrr_types[NUM_FIXED_RANGES]; /* Fixed MTRR descriptors. */ static const struct fixed_mtrr_desc fixed_mtrr_desc[] = { { PHYS_TO_RANGE_ADDR(0x000000), PHYS_TO_RANGE_ADDR(0x080000), - PHYS_TO_RANGE_ADDR(64 * 1024), 0, MTRRfix64K_00000_MSR }, + PHYS_TO_RANGE_ADDR(64 * 1024), 0, MTRR_FIX_64K_00000 }, { PHYS_TO_RANGE_ADDR(0x080000), PHYS_TO_RANGE_ADDR(0x0C0000), - PHYS_TO_RANGE_ADDR(16 * 1024), 8, MTRRfix16K_80000_MSR }, + PHYS_TO_RANGE_ADDR(16 * 1024), 8, MTRR_FIX_16K_80000 }, { PHYS_TO_RANGE_ADDR(0x0C0000), PHYS_TO_RANGE_ADDR(0x100000), - PHYS_TO_RANGE_ADDR(4 * 1024), 24, MTRRfix4K_C0000_MSR }, + PHYS_TO_RANGE_ADDR(4 * 1024), 24, MTRR_FIX_4K_C0000 }, }; static void calc_fixed_mtrrs(void) @@ -410,9 +410,9 @@ static void clear_var_mtrr(int index) { msr_t msr_val; - msr_val = rdmsr(MTRRphysMask_MSR(index)); - msr_val.lo &= ~MTRRphysMaskValid; - wrmsr(MTRRphysMask_MSR(index), msr_val); + msr_val = rdmsr(MTRR_PHYS_MASK(index)); + msr_val.lo &= ~MTRR_PHYS_MASK_VALID; + wrmsr(MTRR_PHYS_MASK(index), msr_val); } static void prep_var_mtrr(struct var_mtrr_state *var_state, @@ -453,7 +453,7 @@ static void prep_var_mtrr(struct var_mtrr_state *var_state, regs->base.hi = rbase >> 32; regs->mask.lo = rsize; - regs->mask.lo |= MTRRphysMaskValid; + regs->mask.lo |= MTRR_PHYS_MASK_VALID; regs->mask.hi = rsize >> 32; } @@ -772,8 +772,8 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol) /* Write out the variable MTRRs. */ disable_cache(); for (i = 0; i < sol->num_used; i++) { - wrmsr(MTRRphysBase_MSR(i), sol->regs[i].base); - wrmsr(MTRRphysMask_MSR(i), sol->regs[i].mask); + wrmsr(MTRR_PHYS_BASE(i), sol->regs[i].base); + wrmsr(MTRR_PHYS_MASK(i), sol->regs[i].mask); } /* Clear the ones that are unused. */ for (; i < total_mtrrs; i++) @@ -818,16 +818,16 @@ void x86_mtrr_check(void) msr_t msr; printk(BIOS_DEBUG, "\nMTRR check\n"); - msr = rdmsr(MTRRdefType_MSR); + msr = rdmsr(MTRR_DEF_TYPE_MSR); printk(BIOS_DEBUG, "Fixed MTRRs : "); - if (msr.lo & MTRRdefTypeFixEn) + if (msr.lo & MTRR_DEF_TYPE_FIX_EN) printk(BIOS_DEBUG, "Enabled\n"); else printk(BIOS_DEBUG, "Disabled\n"); printk(BIOS_DEBUG, "Variable MTRRs: "); - if (msr.lo & MTRRdefTypeEn) + if (msr.lo & MTRR_DEF_TYPE_EN) printk(BIOS_DEBUG, "Enabled\n"); else printk(BIOS_DEBUG, "Disabled\n"); |