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-rw-r--r--src/cpu/x86/cache/cache.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c
index 6413660b83..11524e65db 100644
--- a/src/cpu/x86/cache/cache.c
+++ b/src/cpu/x86/cache/cache.c
@@ -33,7 +33,7 @@ void arch_segment_loaded(uintptr_t start, size_t size, int flags)
to make sure that our code hits dram during romstage. */
if (!ENV_CACHE_AS_RAM)
return;
- if (!ENV_ROMSTAGE)
+ if (!ENV_RAMINIT)
return;
if (!CONFIG(POSTCAR_STAGE))
return;