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Diffstat (limited to 'src/cpu/x86/cache/cache.c')
-rw-r--r--src/cpu/x86/cache/cache.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c
index d02d6d4427..6413660b83 100644
--- a/src/cpu/x86/cache/cache.c
+++ b/src/cpu/x86/cache/cache.c
@@ -12,16 +12,11 @@ bool clflush_supported(void)
return (cpuid_edx(1) >> CPUID_FEATURE_CLFLUSH_BIT) & 1;
}
-static void clflush_region(const uintptr_t start, const size_t size)
+void clflush_region(const uintptr_t start, const size_t size)
{
uintptr_t addr;
const size_t cl_size = ((cpuid_ebx(1) >> 8) & 0xff) * 8;
- if (!clflush_supported()) {
- printk(BIOS_DEBUG, "Not flushing cache to RAM, CLFLUSH not supported\n");
- return;
- }
-
printk(BIOS_SPEW, "CLFLUSH [0x%lx, 0x%lx]\n", start, start + size);
for (addr = ALIGN_DOWN(start, cl_size); addr < start + size; addr += cl_size)
@@ -54,5 +49,8 @@ void arch_segment_loaded(uintptr_t start, size_t size, int flags)
if (!cbmem_online())
return;
- clflush_region(start, size);
+ if (clflush_supported())
+ clflush_region(start, size);
+ else
+ printk(BIOS_DEBUG, "Not flushing cache to RAM, CLFLUSH not supported\n");
}