diff options
Diffstat (limited to 'src/cpu/ti/am335x')
| -rw-r--r-- | src/cpu/ti/am335x/Kconfig | 39 |
1 files changed, 4 insertions, 35 deletions
diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index c4ef8f1703..472fbe7b34 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -6,25 +6,9 @@ config BOOTBLOCK_CPU_INIT bootblock must load microcode or copy data from ROM before searching for the bootblock. -# Example SRAM/iRAM map for Exynos5250 platform: -# -# 0x0202_3400: bootblock, assume up to 32KB in size -# 0x0203_0000: romstage, assume up to 128KB in size. -# 0x0207_8000: stack pointer - -# FIXME: find out where romboot places ml0/coreboot config BOOTBLOCK_BASE hex - default 0xdeadbeef - -#config ROMSTAGE_BASE -# hex -# default 0x02030000 -# -# FIXME: this is bullshit. -config ROMSTAGE_SIZE - hex - default 0xa000 + default 0x402f0400 # Stack may reside in either IRAM or DRAM. We will define it to live # at the top of IRAM for now. @@ -33,11 +17,11 @@ config ROMSTAGE_SIZE # consecutive memory locations ending just below SP config STACK_TOP hex - default 0x02078000 + default 0x4030ce00 config STACK_BOTTOM hex - default 0x02077000 + default 0x4030be00 config STACK_SIZE hex @@ -46,7 +30,7 @@ config STACK_SIZE config CBFS_ROM_OFFSET # Calculated by BL1 + max bootblock size. hex "offset of CBFS data in ROM" - default 0x0A000 + default 0x2800 ## TODO Change this to some better address not overlapping bootblock when ## cbfstool supports creating header in arbitrary location. @@ -54,21 +38,6 @@ config CBFS_HEADER_ROM_OFFSET hex "offset of master CBFS header in ROM" default 0x40 -## TODO We may probably move this to board-specific implementation files instead -## of KConfig values. -#config CBFS_CACHE_ADDRESS -# hex "memory address to put CBFS cache data" -# default 0x02060000 -# -#config CBFS_CACHE_SIZE -# hex "size of CBFS cache data" -# default 0x000017000 - -# FIXME: other magic numbers that should probably go away -config XIP_ROM_SIZE - hex - default ROMSTAGE_SIZE - config SYS_SDRAM_BASE hex default 0x40000000 |