diff options
Diffstat (limited to 'src/cpu/ti/am335x/pinmux.c')
| -rw-r--r-- | src/cpu/ti/am335x/pinmux.c | 190 |
1 files changed, 190 insertions, 0 deletions
diff --git a/src/cpu/ti/am335x/pinmux.c b/src/cpu/ti/am335x/pinmux.c new file mode 100644 index 0000000000..292865a495 --- /dev/null +++ b/src/cpu/ti/am335x/pinmux.c @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include "pinmux.h" + +#include <arch/io.h> +#include <config.h> + +static struct am335x_pinmux_regs *regs = + (struct am335x_pinmux_regs *)(uintptr_t)AM335X_PINMUX_REG_ADDR; + +void am335x_pinmux_uart0(void) +{ + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->uart0_rxd); + writel(MODE(0) | PULLUDEN, ®s->uart0_txd); +} + +void am335x_pinmux_uart1(void) +{ + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->uart1_rxd); + writel(MODE(0) | PULLUDEN, ®s->uart1_txd); +} + +void am335x_pinmux_uart2(void) +{ + // UART2_RXD + writel(MODE(1) | PULLUP_EN | RXACTIVE, ®s->spi0_sclk); + // UART2_TXD + writel(MODE(1) | PULLUDEN, ®s->spi0_d0); +} + +void am335x_pinmux_uart3(void) +{ + // UART3_RXD + writel(MODE(1) | PULLUP_EN | RXACTIVE, ®s->spi0_cs1); + // UART3_TXD + writel(MODE(1) | PULLUDEN, ®s->ecap0_in_pwm0_out); +} + +void am335x_pinmux_uart4(void) +{ + // UART4_RXD + writel(MODE(6) | PULLUP_EN | RXACTIVE, ®s->gpmc_wait0); + // UART4_TXD + writel(MODE(6) | PULLUDEN, ®s->gpmc_wpn); +} + +void am335x_pinmux_uart5(void) +{ + // UART5_RXD + writel(MODE(4) | PULLUP_EN | RXACTIVE, ®s->lcd_data9); + // UART5_TXD + writel(MODE(4) | PULLUDEN, ®s->lcd_data8); +} + +void am335x_pinmux_mmc0(int cd, int sk_evm) +{ + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mmc0_dat0); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mmc0_dat1); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mmc0_dat2); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mmc0_dat3); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mmc0_clk); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mmc0_cmd); + if (!sk_evm) { + // MMC0_WP + writel(MODE(4) | RXACTIVE, ®s->mcasp0_aclkr); + } + if (cd) { + // MMC0_CD + writel(MODE(5) | RXACTIVE | PULLUP_EN, ®s->spi0_cs1); + } +} + +void am335x_pinmux_mmc1(void) +{ + // MMC1_DAT0 + writel(MODE(1) | RXACTIVE | PULLUP_EN, ®s->gpmc_ad0); + // MMC1_DAT1 + writel(MODE(1) | RXACTIVE | PULLUP_EN, ®s->gpmc_ad1); + // MMC1_DAT2 + writel(MODE(1) | RXACTIVE | PULLUP_EN, ®s->gpmc_ad2); + // MMC1_DAT3 + writel(MODE(1) | RXACTIVE | PULLUP_EN, ®s->gpmc_ad3); + // MMC1_CLK + writel(MODE(2) | RXACTIVE | PULLUP_EN, ®s->gpmc_csn1); + // MMC1_CMD + writel(MODE(2) | RXACTIVE | PULLUP_EN, ®s->gpmc_csn2); + // MMC1_WP + writel(MODE(7) | RXACTIVE | PULLUP_EN, ®s->gpmc_csn0); + // MMC1_CD + writel(MODE(7) | RXACTIVE | PULLUP_EN, ®s->gpmc_advn_ale); +} + +void am335x_pinmux_i2c0(void) +{ + writel(MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL, ®s->i2c0_sda); + writel(MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL, ®s->i2c0_scl); +} + +void am335x_pinmux_i2c1(void) +{ + // I2C_DATA + writel(MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL, ®s->spi0_d1); + // I2C_SCLK + writel(MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL, ®s->spi0_cs0); +} + +void am335x_pinmux_spi0(void) +{ + writel(MODE(0) | RXACTIVE | PULLUDEN, ®s->spi0_sclk); + writel(MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN, ®s->spi0_d0); + writel(MODE(0) | RXACTIVE | PULLUDEN, ®s->spi0_d1); + writel(MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN, ®s->spi0_cs0); +} + +void am335x_pinmux_gpio0_7(void) +{ + writel(MODE(7) | PULLUDEN, ®s->ecap0_in_pwm0_out); +} + +void am335x_pinmux_rgmii1(void) +{ + writel(MODE(2), ®s->mii1_txen); + writel(MODE(2) | RXACTIVE, ®s->mii1_rxdv); + writel(MODE(2), ®s->mii1_txd0); + writel(MODE(2), ®s->mii1_txd1); + writel(MODE(2), ®s->mii1_txd2); + writel(MODE(2), ®s->mii1_txd3); + writel(MODE(2), ®s->mii1_txclk); + writel(MODE(2) | RXACTIVE, ®s->mii1_rxclk); + writel(MODE(2) | RXACTIVE, ®s->mii1_rxd0); + writel(MODE(2) | RXACTIVE, ®s->mii1_rxd1); + writel(MODE(2) | RXACTIVE, ®s->mii1_rxd2); + writel(MODE(2) | RXACTIVE, ®s->mii1_rxd3); +} + +void am335x_pinmux_mii1(void) +{ + writel(MODE(0) | RXACTIVE, ®s->mii1_rxerr); + writel(MODE(0), ®s->mii1_txen); + writel(MODE(0) | RXACTIVE, ®s->mii1_rxdv); + writel(MODE(0), ®s->mii1_txd0); + writel(MODE(0), ®s->mii1_txd1); + writel(MODE(0), ®s->mii1_txd2); + writel(MODE(0), ®s->mii1_txd3); + writel(MODE(0) | RXACTIVE, ®s->mii1_txclk); + writel(MODE(0) | RXACTIVE, ®s->mii1_rxclk); + writel(MODE(0) | RXACTIVE, ®s->mii1_rxd0); + writel(MODE(0) | RXACTIVE, ®s->mii1_rxd1); + writel(MODE(0) | RXACTIVE, ®s->mii1_rxd2); + writel(MODE(0) | RXACTIVE, ®s->mii1_rxd3); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->mdio_data); + writel(MODE(0) | PULLUP_EN, ®s->mdio_clk); +} + +void am335x_pinmux_nand(void) +{ + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad0); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad1); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad2); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad3); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad4); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad5); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad6); + writel(MODE(0) | PULLUP_EN | RXACTIVE, ®s->gpmc_ad7); + writel(MODE(0) | RXACTIVE | PULLUP_EN, ®s->gpmc_wait0); + writel(MODE(7) | PULLUP_EN | RXACTIVE, ®s->gpmc_wpn); + writel(MODE(0) | PULLUDEN, ®s->gpmc_csn0); + writel(MODE(0) | PULLUDEN, ®s->gpmc_advn_ale); + writel(MODE(0) | PULLUDEN, ®s->gpmc_oen_ren); + writel(MODE(0) | PULLUDEN, ®s->gpmc_wen); + writel(MODE(0) | PULLUDEN, ®s->gpmc_be0n_cle); +} |