diff options
Diffstat (limited to 'src/cpu/samsung')
| -rw-r--r-- | src/cpu/samsung/exynos5420/clock_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5420/setup.h | 17 |
2 files changed, 10 insertions, 9 deletions
diff --git a/src/cpu/samsung/exynos5420/clock_init.c b/src/cpu/samsung/exynos5420/clock_init.c index 8be286dd60..658b2559e8 100644 --- a/src/cpu/samsung/exynos5420/clock_init.c +++ b/src/cpu/samsung/exynos5420/clock_init.c @@ -214,7 +214,7 @@ void system_clock_init(void) writel(CLK_DIV_G2D, &clk->clk_div_g2d); writel(CLK_SRC_CPU_VAL, &clk->clk_src_cpu); - writel(CLK_SRC_TOP3_VAL, &clk->clk_src_top6); + writel(CLK_SRC_TOP6_VAL, &clk->clk_src_top6); writel(CLK_SRC_CDREX_VAL, &clk->clk_src_cdrex); writel(CLK_SRC_KFC_VAL, &clk->clk_src_kfc); } diff --git a/src/cpu/samsung/exynos5420/setup.h b/src/cpu/samsung/exynos5420/setup.h index c2f69d23b8..794d4e14df 100644 --- a/src/cpu/samsung/exynos5420/setup.h +++ b/src/cpu/samsung/exynos5420/setup.h @@ -225,18 +225,19 @@ struct exynos5_phy_control; #define CLK_DIV_CPU0_VAL 0x01440020 /* CLK_SRC_TOP */ -#define CLK_SRC_TOP0_VAL 0x12222222 -#define CLK_SRC_TOP1_VAL 0x00100200 -#define CLK_SRC_TOP2_VAL 0x11101000 +#define CLK_SRC_TOP0_VAL 0x11101102 +#define CLK_SRC_TOP1_VAL 0x00200000 +#define CLK_SRC_TOP2_VAL 0x11101010 #define CLK_SRC_TOP3_VAL 0x11111111 #define CLK_SRC_TOP4_VAL 0x11110111 -#define CLK_SRC_TOP5_VAL 0x11111110 +#define CLK_SRC_TOP5_VAL 0x11111111 +#define CLK_SRC_TOP6_VAL 0x11110111 #define CLK_SRC_TOP7_VAL 0x00022200 /* CLK_DIV_TOP */ -#define CLK_DIV_TOP0_VAL 0x23713311 -#define CLK_DIV_TOP1_VAL 0x13100B00 -#define CLK_DIV_TOP2_VAL 0x11101100 +#define CLK_DIV_TOP0_VAL 0x22512211 +#define CLK_DIV_TOP1_VAL 0x13200900 +#define CLK_DIV_TOP2_VAL 0x11101110 /* APLL_LOCK */ #define APLL_LOCK_VAL (0x320) @@ -439,7 +440,7 @@ struct exynos5_phy_control; #define CLK_DIV_ISP2_VAL 0x1 /* CLK_SRC_DISP1_0 */ -#define CLK_SRC_DISP1_0_VAL 0x10666600 +#define CLK_SRC_DISP1_0_VAL 0x10006000 #define CLK_DIV_DISP1_0_VAL 0x01050210 /* |