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Diffstat (limited to 'src/cpu/samsung/exynos5420/clk.h')
-rw-r--r--src/cpu/samsung/exynos5420/clk.h12
1 files changed, 2 insertions, 10 deletions
diff --git a/src/cpu/samsung/exynos5420/clk.h b/src/cpu/samsung/exynos5420/clk.h
index b37c076582..c5e7f589ba 100644
--- a/src/cpu/samsung/exynos5420/clk.h
+++ b/src/cpu/samsung/exynos5420/clk.h
@@ -25,6 +25,7 @@
enum periph_id;
+/* This master list of PLLs is ordered arbitrarily. */
#define APLL 0
#define MPLL 1
#define EPLL 2
@@ -35,16 +36,7 @@ enum periph_id;
#define SPLL 7
#define CPLL 8
#define DPLL 9
-
-enum pll_src_bit {
- EXYNOS_SRC_CPLL = 1,
- EXYNOS_SRC_DPLL = 2,
- EXYNOS_SRC_MPLL = 3,
- EXYNOS_SRC_SPLL = 4,
- EXYNOS_SRC_IPLL = 5,
- EXYNOS_SRC_EPLL = 6,
- EXYNOS_SRC_RPLL = 7,
-};
+#define IPLL 10
/* *
* This structure is to store the src bit, div bit and prediv bit