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-rw-r--r--src/cpu/k8/earlymtrr.c6
-rw-r--r--src/cpu/k8/earlymtrr.inc2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/k8/earlymtrr.c b/src/cpu/k8/earlymtrr.c
index 2138e3fefe..16cd809f97 100644
--- a/src/cpu/k8/earlymtrr.c
+++ b/src/cpu/k8/earlymtrr.c
@@ -30,7 +30,7 @@ static void early_mtrr_init(void)
/* Enable the access to AMD RdDram and WrDram extension bits */
msr = rdmsr(SYSCFG_MSR);
msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;
- wrmsr(msr);
+ wrmsr(SYSCFG_MSR, msr);
/* Inialize all of the relevant msrs to 0 */
msr.lo = 0;
@@ -43,7 +43,7 @@ static void early_mtrr_init(void)
/* Disable the access to AMD RdDram and WrDram extension bits */
msr = rdmsr(SYSCFG_MSR);
msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn;
- wrmsr(msr);
+ wrmsr(SYSCFG_MSR, msr);
/* Enable memory access for 0 - 1MB using top_mem */
msr.hi = 0;
@@ -87,7 +87,7 @@ static void early_mtrr_init(void)
/* Enale the MTRRs in SYSCFG */
msr = rdmsr(SYSCFG_MSR);
- msr.lo |= SYSCFG_MSR_MtrrrVarDramEn;
+ msr.lo |= SYSCFG_MSR_MtrrVarDramEn;
wrmsr(SYSCFG_MSR, msr);
/* Enable the cache */
diff --git a/src/cpu/k8/earlymtrr.inc b/src/cpu/k8/earlymtrr.inc
index d5c754742b..81376bfb01 100644
--- a/src/cpu/k8/earlymtrr.inc
+++ b/src/cpu/k8/earlymtrr.inc
@@ -89,7 +89,7 @@ enable_mtrr:
/* Enable the MTRRs and IORRs in SYSCFG */
movl $SYSCFG_MSR, %ecx
rdmsr
- /* Don't enable SYSCFG_MSR_MtrrFixDramEn) untill we have done with VGA BIOS */
+ /* Don't enable SYSCFG_MSR_MtrrFixDramEn untill we have done with VGA BIOS */
orl $(SYSCFG_MSR_MtrrVarDramEn), %eax
wrmsr