diff options
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/model_2065x/finalize.c | 3 | ||||
| -rw-r--r-- | src/cpu/intel/model_2065x/model_2065x.h | 1 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c index 50e00bf74a..5e7b3d847c 100644 --- a/src/cpu/intel/model_2065x/finalize.c +++ b/src/cpu/intel/model_2065x/finalize.c @@ -54,7 +54,4 @@ void intel_model_2065x_finalize_smm(void) /* Lock TM interupts - route thermal events to all processors */ msr_set_bit(MSR_MISC_PWR_MGMT, 22); - - /* Lock memory configuration to protect SMM */ - msr_set_bit(MSR_LT_LOCK_MEMORY, 0); } diff --git a/src/cpu/intel/model_2065x/model_2065x.h b/src/cpu/intel/model_2065x/model_2065x.h index 8bb3b877e8..f87ba77460 100644 --- a/src/cpu/intel/model_2065x/model_2065x.h +++ b/src/cpu/intel/model_2065x/model_2065x.h @@ -39,7 +39,6 @@ #define ENERGY_POLICY_NORMAL 6 #define ENERGY_POLICY_POWERSAVE 15 #define IA32_PACKAGE_THERM_INTERRUPT 0x1b2 -#define MSR_LT_LOCK_MEMORY 0x2e7 #define IA32_MC0_STATUS 0x401 #define MSR_PIC_MSG_CONTROL 0x2e |