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-rw-r--r--src/cpu/intel/ep80579/Kconfig2
-rw-r--r--src/cpu/intel/socket_441/Kconfig2
-rw-r--r--src/cpu/intel/socket_BGA956/Kconfig2
-rw-r--r--src/cpu/intel/socket_FCBGA559/Kconfig2
-rw-r--r--src/cpu/intel/socket_LGA771/Kconfig12
-rw-r--r--src/cpu/intel/socket_mFCPGA478/Kconfig2
-rw-r--r--src/cpu/intel/socket_mPGA478MN/Kconfig2
-rw-r--r--src/cpu/intel/socket_mPGA604/Kconfig2
8 files changed, 19 insertions, 7 deletions
diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig
index 062f10167c..dc19ae1c30 100644
--- a/src/cpu/intel/ep80579/Kconfig
+++ b/src/cpu/intel/ep80579/Kconfig
@@ -14,7 +14,7 @@ if CPU_INTEL_EP80579
config DCACHE_RAM_BASE
hex
- default 0xffaf8000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig
index 226919078a..ac249c5755 100644
--- a/src/cpu/intel/socket_441/Kconfig
+++ b/src/cpu/intel/socket_441/Kconfig
@@ -11,7 +11,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
config DCACHE_RAM_BASE
hex
- default 0xffaf8000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig
index 4dd5a60528..6c5e414029 100644
--- a/src/cpu/intel/socket_BGA956/Kconfig
+++ b/src/cpu/intel/socket_BGA956/Kconfig
@@ -8,7 +8,7 @@ if CPU_INTEL_SOCKET_BGA956
config DCACHE_RAM_BASE
hex
- default 0xffaf8000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig
index 9eaa71b58a..d1cc80f7bc 100644
--- a/src/cpu/intel/socket_FCBGA559/Kconfig
+++ b/src/cpu/intel/socket_FCBGA559/Kconfig
@@ -11,7 +11,7 @@ config SOCKET_SPECIFIC_OPTIONS
config DCACHE_RAM_BASE
hex
- default 0xffafc000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/socket_LGA771/Kconfig b/src/cpu/intel/socket_LGA771/Kconfig
index 1df55e61c3..d9bd44ddd8 100644
--- a/src/cpu/intel/socket_LGA771/Kconfig
+++ b/src/cpu/intel/socket_LGA771/Kconfig
@@ -4,3 +4,15 @@ config CPU_INTEL_SOCKET_LGA771
select SSE2
select MMX
select AP_IN_SIPI_WAIT
+
+if CPU_INTEL_SOCKET_LGA771
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xfefc0000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x8000
+
+endif
diff --git a/src/cpu/intel/socket_mFCPGA478/Kconfig b/src/cpu/intel/socket_mFCPGA478/Kconfig
index b67f5e622d..075abad961 100644
--- a/src/cpu/intel/socket_mFCPGA478/Kconfig
+++ b/src/cpu/intel/socket_mFCPGA478/Kconfig
@@ -12,7 +12,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
config DCACHE_RAM_BASE
hex
- default 0xffaf8000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/socket_mPGA478MN/Kconfig b/src/cpu/intel/socket_mPGA478MN/Kconfig
index 7c4dbc5b29..7d97022cc6 100644
--- a/src/cpu/intel/socket_mPGA478MN/Kconfig
+++ b/src/cpu/intel/socket_mPGA478MN/Kconfig
@@ -9,7 +9,7 @@ if CPU_INTEL_SOCKET_MPGA478MN
config DCACHE_RAM_BASE
hex
- default 0xffaf8000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
index d5d668a202..94d6a09b3f 100644
--- a/src/cpu/intel/socket_mPGA604/Kconfig
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -22,7 +22,7 @@ config SSE2
config DCACHE_RAM_BASE
hex
- default 0x0ffafc000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex