diff options
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/model_1067x/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_6fx/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/smm/gen1/smi.h | 1 | ||||
| -rw-r--r-- | src/cpu/intel/smm/gen1/smmrelocate.c | 2 |
4 files changed, 4 insertions, 1 deletions
diff --git a/src/cpu/intel/model_1067x/Makefile.inc b/src/cpu/intel/model_1067x/Makefile.inc index 3e6cb2c24b..133c9cff8f 100644 --- a/src/cpu/intel/model_1067x/Makefile.inc +++ b/src/cpu/intel/model_1067x/Makefile.inc @@ -1,5 +1,6 @@ ramstage-y += model_1067x_init.c subdirs-y += ../../x86/name subdirs-y += ../common +subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_1067x/microcode.bin diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index de6fd8d93d..a0824fdb18 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -1,5 +1,6 @@ ramstage-y += model_6fx_init.c subdirs-y += ../../x86/name subdirs-y += ../common +subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6fx/microcode.bin diff --git a/src/cpu/intel/smm/gen1/smi.h b/src/cpu/intel/smm/gen1/smi.h index c328eae91a..f4cbbc3699 100644 --- a/src/cpu/intel/smm/gen1/smi.h +++ b/src/cpu/intel/smm/gen1/smi.h @@ -16,5 +16,6 @@ void southbridge_smm_init(void); void southbridge_trigger_smi(void); void southbridge_clear_smi_status(void); u32 northbridge_get_tseg_base(void); +u32 northbridge_get_tseg_size(void); int cpu_get_apic_id_map(int *apic_id_map); void northbridge_write_smram(u8 smram); diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c index c50d8a4743..b48fe006bc 100644 --- a/src/cpu/intel/smm/gen1/smmrelocate.c +++ b/src/cpu/intel/smm/gen1/smmrelocate.c @@ -147,7 +147,7 @@ static void fill_in_relocation_params(struct smm_relocation_params *params) /* TSEG base is usually aligned down (to 8MiB). So we can't derive the TSEG size from the distance to GTT but use the configuration value instead. */ - const u32 tseg_size = CONFIG_SMM_TSEG_SIZE; + const u32 tseg_size = northbridge_get_tseg_size(); /* The SMRAM available to the handler is 4MiB since the IEDRAM lives at TSEGMB + 4MiB. */ |