diff options
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/haswell/romstage.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 3cbdf44c1d..47b9976786 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -38,8 +38,6 @@ #include <cpu/intel/romstage.h> #include "haswell.h" -#define ROMSTAGE_RAM_STACK_SIZE 0x5000 - /* platform_enter_postcar() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use, * and continues execution in postcar stage. */ @@ -48,7 +46,7 @@ void platform_enter_postcar(void) struct postcar_frame pcf; uintptr_t top_of_ram; - if (postcar_frame_init(&pcf, ROMSTAGE_RAM_STACK_SIZE)) + if (postcar_frame_init(&pcf, 0)) die("Unable to initialize postcar frame.\n"); /* Cache the ROM as WP just below 4GiB. */ postcar_frame_add_romcache(&pcf, MTRR_TYPE_WRPROT); |