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-rw-r--r--src/cpu/intel/model_65x/Kconfig1
-rw-r--r--src/cpu/intel/model_65x/model_65x_init.c2
-rw-r--r--src/cpu/intel/model_67x/Kconfig1
-rw-r--r--src/cpu/intel/model_67x/model_67x_init.c2
-rw-r--r--src/cpu/intel/model_68x/Kconfig1
-rw-r--r--src/cpu/intel/model_68x/model_68x_init.c2
-rw-r--r--src/cpu/intel/model_6bx/Kconfig1
-rw-r--r--src/cpu/intel/model_6bx/model_6bx_init.c2
-rw-r--r--src/cpu/intel/model_6ex/Kconfig1
-rw-r--r--src/cpu/intel/model_6ex/model_6ex_init.c2
-rw-r--r--src/cpu/intel/model_6fx/Kconfig1
-rw-r--r--src/cpu/intel/model_6fx/model_6fx_init.c2
-rw-r--r--src/cpu/intel/model_6xx/Kconfig1
-rw-r--r--src/cpu/intel/model_6xx/model_6xx_init.c2
-rw-r--r--src/cpu/intel/model_f2x/Kconfig1
-rw-r--r--src/cpu/intel/model_f2x/model_f2x_init.c2
-rw-r--r--src/cpu/intel/model_f3x/Kconfig1
-rw-r--r--src/cpu/intel/model_f3x/model_f3x_init.c2
-rw-r--r--src/cpu/intel/model_f4x/Kconfig1
-rw-r--r--src/cpu/intel/model_f4x/model_f4x_init.c2
20 files changed, 10 insertions, 20 deletions
diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig
index 42bdc3f3a8..6d41d94f57 100644
--- a/src/cpu/intel/model_65x/Kconfig
+++ b/src/cpu/intel/model_65x/Kconfig
@@ -2,4 +2,3 @@ config CPU_INTEL_MODEL_65X
bool
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_65x/model_65x_init.c b/src/cpu/intel/model_65x/model_65x_init.c
index cf1394add8..9a17f7093f 100644
--- a/src/cpu/intel/model_65x/model_65x_init.c
+++ b/src/cpu/intel/model_65x/model_65x_init.c
@@ -16,7 +16,7 @@ static void model_65x_init(struct device *dev)
p6_configure_l2_cache();
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
x86_setup_mtrrs();
x86_mtrr_check();
diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig
index da57caa2da..26a303be01 100644
--- a/src/cpu/intel/model_67x/Kconfig
+++ b/src/cpu/intel/model_67x/Kconfig
@@ -2,4 +2,3 @@ config CPU_INTEL_MODEL_67X
bool
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_67x/model_67x_init.c b/src/cpu/intel/model_67x/model_67x_init.c
index 427d658682..6a2689ddb1 100644
--- a/src/cpu/intel/model_67x/model_67x_init.c
+++ b/src/cpu/intel/model_67x/model_67x_init.c
@@ -17,7 +17,7 @@ static void model_67x_init(struct device *cpu)
p6_configure_l2_cache();
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
/* Setup MTRRs */
x86_setup_mtrrs();
diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig
index 0ab1e7af51..796290770f 100644
--- a/src/cpu/intel/model_68x/Kconfig
+++ b/src/cpu/intel/model_68x/Kconfig
@@ -4,4 +4,3 @@ config CPU_INTEL_MODEL_68X
bool
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_68x/model_68x_init.c b/src/cpu/intel/model_68x/model_68x_init.c
index 3402c603e0..2344cb7e9f 100644
--- a/src/cpu/intel/model_68x/model_68x_init.c
+++ b/src/cpu/intel/model_68x/model_68x_init.c
@@ -14,7 +14,7 @@ static void model_68x_init(struct device *cpu)
char processor_name[49];
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
/* Update the microcode */
intel_update_microcode_from_cbfs();
diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig
index cb9d6f3677..14274a3236 100644
--- a/src/cpu/intel/model_6bx/Kconfig
+++ b/src/cpu/intel/model_6bx/Kconfig
@@ -2,4 +2,3 @@ config CPU_INTEL_MODEL_6BX
bool
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c
index 2e7069c0a4..f27a63ac50 100644
--- a/src/cpu/intel/model_6bx/model_6bx_init.c
+++ b/src/cpu/intel/model_6bx/model_6bx_init.c
@@ -14,7 +14,7 @@ static void model_6bx_init(struct device *cpu)
char processor_name[49];
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
/* Update the microcode */
intel_update_microcode_from_cbfs();
diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index 37bfa14ad1..c7d54c5f8c 100644
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -9,4 +9,3 @@ config CPU_INTEL_MODEL_6EX
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_COMMON
select CPU_INTEL_COMMON_TIMEBASE
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index 16c6866f45..34646ad5e9 100644
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -97,7 +97,7 @@ static void model_6ex_init(struct device *cpu)
char processor_name[49];
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
/* Print processor name */
fill_processor_name(processor_name);
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 8e035608ad..499972600a 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -10,4 +10,3 @@ config CPU_INTEL_MODEL_6FX
select CPU_INTEL_COMMON
select CPU_INTEL_COMMON_TIMEBASE
select SETUP_XIP_CACHE
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index d0987b4a63..72ece23935 100644
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -111,7 +111,7 @@ static void model_6fx_init(struct device *cpu)
char processor_name[49];
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
/* Print processor name */
fill_processor_name(processor_name);
diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig
index 95e175e052..e05cf89517 100644
--- a/src/cpu/intel/model_6xx/Kconfig
+++ b/src/cpu/intel/model_6xx/Kconfig
@@ -2,4 +2,3 @@ config CPU_INTEL_MODEL_6XX
bool
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index 2e93507b5b..48a045ecc8 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -10,7 +10,7 @@
static void model_6xx_init(struct device *dev)
{
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
x86_setup_mtrrs();
x86_mtrr_check();
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index 3339b66b00..672cf75517 100644
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -4,4 +4,3 @@ config CPU_INTEL_MODEL_F2X
select SUPPORT_CPU_UCODE_IN_CBFS
select SMM_ASEG
select CPU_INTEL_COMMON
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c
index fc919a7cde..9f365c6ebc 100644
--- a/src/cpu/intel/model_f2x/model_f2x_init.c
+++ b/src/cpu/intel/model_f2x/model_f2x_init.c
@@ -12,7 +12,7 @@
static void model_f2x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
if (!intel_ht_sibling()) {
/* MTRRs are shared between threads */
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index 943d9cc155..b0a9f7ce64 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -3,4 +3,3 @@ config CPU_INTEL_MODEL_F3X
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_COMMON
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c
index bf08d7b23c..ba3a4d60da 100644
--- a/src/cpu/intel/model_f3x/model_f3x_init.c
+++ b/src/cpu/intel/model_f3x/model_f3x_init.c
@@ -12,7 +12,7 @@
static void model_f3x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
if (!CONFIG(PARALLEL_MP) && !intel_ht_sibling()) {
/* MTRRs are shared between threads */
diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index 4dd40384fb..550a978e85 100644
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -2,4 +2,3 @@ config CPU_INTEL_MODEL_F4X
bool
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_X86_CACHE_HELPER
diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c
index 5ebddc06fe..ee6761ed13 100644
--- a/src/cpu/intel/model_f4x/model_f4x_init.c
+++ b/src/cpu/intel/model_f4x/model_f4x_init.c
@@ -8,7 +8,7 @@
static void model_f4x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
- x86_enable_cache();
+ enable_cache();
/* Enable the local CPU APICs */
setup_lapic();