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-rw-r--r--src/cpu/intel/haswell/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index ee87effc87..0426bb4cea 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -20,7 +20,6 @@
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
-#include <lib.h>
#include <timestamp.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
@@ -121,9 +120,6 @@ void romstage_common(const struct romstage_params *params)
intel_early_me_status();
- quick_ram_check();
- post_code(0x3e);
-
if (!wake_from_s3) {
cbmem_initialize_empty();
/* Save data returned from MRC on non-S3 resumes. */