summaryrefslogtreecommitdiff
path: root/src/cpu/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/mp_init.c3
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c6
2 files changed, 5 insertions, 4 deletions
diff --git a/src/cpu/intel/haswell/mp_init.c b/src/cpu/intel/haswell/mp_init.c
index 47683fb78c..7f15c391d7 100644
--- a/src/cpu/intel/haswell/mp_init.c
+++ b/src/cpu/intel/haswell/mp_init.c
@@ -149,7 +149,8 @@ static void cleanup_rom_caching(void)
/* By the time APs call ap_init() caching has been setup, and microcode has
* been loaded. */
-static void ap_init(unsigned int cpu, void *microcode_ptr)
+static void __attribute__((cdecl))
+ap_init(unsigned int cpu, void *microcode_ptr)
{
struct cpu_info *info;
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 4312d7953e..2bf304ebbf 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -85,8 +85,8 @@ static inline void write_uncore_emrr(struct smm_relocation_params *relo_params)
/* The relocation work is actually performed in SMM context, but the code
* resides in the ramstage module. This occurs by trampolining from the default
* SMRAM entry point to here. */
-static void cpu_smm_do_relocation(void *arg, int cpu,
- const struct smm_runtime *runtime)
+static void __attribute__((cdecl))
+cpu_smm_do_relocation(void *arg, int cpu, const struct smm_runtime *runtime)
{
em64t101_smm_state_save_area_t *save_state;
msr_t mtrr_cap;
@@ -209,7 +209,7 @@ static int install_relocation_handler(int num_cpus,
.num_concurrent_stacks = num_cpus,
.per_cpu_save_state_size = save_state_size,
.num_concurrent_save_states = 1,
- .handler = &cpu_smm_do_relocation,
+ .handler = (smm_handler_t)&cpu_smm_do_relocation,
.handler_arg = (void *)relo_params,
};