aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/intel/speedstep/acpi/cpu.asl
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/speedstep/acpi/cpu.asl')
-rw-r--r--src/cpu/intel/speedstep/acpi/cpu.asl16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/intel/speedstep/acpi/cpu.asl b/src/cpu/intel/speedstep/acpi/cpu.asl
index 9ff3f76727..2d1a47bc78 100644
--- a/src/cpu/intel/speedstep/acpi/cpu.asl
+++ b/src/cpu/intel/speedstep/acpi/cpu.asl
@@ -12,20 +12,20 @@
*/
/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-External (\_PR_.CP00, DeviceObj)
-External (\_PR_.CP00._PPC)
-External (\_PR_.CP01._PPC)
+External (\_SB.CNOT, MethodObj)
+External (\_SB_.CP00, DeviceObj)
+External (\_SB_.CP00._PPC)
+External (\_SB_.CP01._PPC)
Method (PNOT)
{
If (MPEN) {
- \_PR.CNOT (0x80) // _PPC
+ \_SB.CNOT (0x80) // _PPC
Sleep(100)
- \_PR.CNOT (0x81) // _CST
+ \_SB.CNOT (0x81) // _CST
} Else { // UP
- Notify (\_PR_.CP00, 0x80)
+ Notify (\_SB_.CP00, 0x80)
Sleep(0x64)
- Notify(\_PR_.CP00, 0x81)
+ Notify(\_SB_.CP00, 0x81)
}
}