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-rw-r--r--src/cpu/intel/socket_mPGA604/Kconfig36
-rw-r--r--src/cpu/intel/socket_mPGA604/Makefile.inc9
2 files changed, 45 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
new file mode 100644
index 0000000000..7b086990f7
--- /dev/null
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -0,0 +1,36 @@
+config CPU_INTEL_SOCKET_MPGA604
+ bool
+
+if CPU_INTEL_SOCKET_MPGA604
+
+config SOCKET_SPECIFIC_OPTIONS
+ def_bool y
+ select CPU_INTEL_MODEL_F2X
+ select MMX
+ select SSE
+ select UDELAY_TSC
+ select TSC_MONOTONIC_TIMER
+ select SIPI_VECTOR_IN_ROM
+ select CPU_INTEL_COMMON
+ select CPU_INTEL_COMMON_TIMEBASE
+
+# mPGA604 are usually Intel Netburst CPUs which should have SSE2
+# but the ramtest.c code on the Dell S1850 seems to choke on
+# enabling it, so disable it for now.
+config SSE2
+ bool
+ default n
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xfefc0000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x4000
+
+config DCACHE_BSP_STACK_SIZE
+ hex
+ default 0x2000
+
+endif # CPU_INTEL_SOCKET_MPGA604
diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc
new file mode 100644
index 0000000000..f9dfc67b0c
--- /dev/null
+++ b/src/cpu/intel/socket_mPGA604/Makefile.inc
@@ -0,0 +1,9 @@
+subdirs-y += ../model_f2x
+subdirs-y += ../../x86/lapic
+subdirs-y += ../microcode
+
+bootblock-y += ../car/p4-netburst/cache_as_ram.S
+bootblock-y += ../car/bootblock.c
+
+postcar-y += ../car/p4-netburst/exit_car.S
+romstage-y += ../car/romstage.c