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-rw-r--r--src/cpu/intel/socket_mPGA478MN/Makefile.inc14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_mPGA478MN/Makefile.inc b/src/cpu/intel/socket_mPGA478MN/Makefile.inc
new file mode 100644
index 0000000000..407861e164
--- /dev/null
+++ b/src/cpu/intel/socket_mPGA478MN/Makefile.inc
@@ -0,0 +1,14 @@
+subdirs-y += ../model_6fx
+subdirs-y += ../model_1067x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+subdirs-y += ../speedstep
+
+# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
+cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
+romstage-y += ../car/romstage.c