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-rw-r--r--src/cpu/intel/socket_BGA956/Makefile.inc12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc
new file mode 100644
index 0000000000..a290e6997a
--- /dev/null
+++ b/src/cpu/intel/socket_BGA956/Makefile.inc
@@ -0,0 +1,12 @@
+ramstage-y += socket_BGA956.c
+subdirs-y += ../model_1067x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+
+# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
+cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc