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Diffstat (limited to 'src/cpu/intel/slot_1/l2_cache.c')
| -rw-r--r-- | src/cpu/intel/slot_1/l2_cache.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c index ce3634b667..57d1fd4af0 100644 --- a/src/cpu/intel/slot_1/l2_cache.c +++ b/src/cpu/intel/slot_1/l2_cache.c @@ -189,7 +189,6 @@ int calculate_l2_latency(void) return 0; } - /* Setup address, data_high:data_low into the L2 * control registers and then issue command with correct cache way */ |