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Diffstat (limited to 'src/cpu/intel/slot_1/l2_cache.c')
-rw-r--r--src/cpu/intel/slot_1/l2_cache.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c
index 7821ad1ff5..2602527d5f 100644
--- a/src/cpu/intel/slot_1/l2_cache.c
+++ b/src/cpu/intel/slot_1/l2_cache.c
@@ -1,9 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2000 Denis Dowling <dpd@alphalink.com.au>
- * Copyright (C) 2010 Keith Hui <buurin@gmail.com>
- *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or