diff options
Diffstat (limited to 'src/cpu/intel/model_f2x')
| -rw-r--r-- | src/cpu/intel/model_f2x/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_f2x/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/cpu/intel/model_f2x/microcode_blob.c | 33 | ||||
| -rw-r--r-- | src/cpu/intel/model_f2x/model_f2x_init.c | 36 |
4 files changed, 37 insertions, 35 deletions
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 50cac7937c..8483d332f4 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,3 +1,4 @@ config CPU_INTEL_MODEL_F2X bool select SMP + select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Makefile.inc b/src/cpu/intel/model_f2x/Makefile.inc index 9b366d6e8e..3360611b31 100644 --- a/src/cpu/intel/model_f2x/Makefile.inc +++ b/src/cpu/intel/model_f2x/Makefile.inc @@ -1 +1,3 @@ ramstage-y += model_f2x_init.c + +cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c diff --git a/src/cpu/intel/model_f2x/microcode_blob.c b/src/cpu/intel/model_f2x/microcode_blob.c new file mode 100644 index 0000000000..e8c9302a37 --- /dev/null +++ b/src/cpu/intel/model_f2x/microcode_blob.c @@ -0,0 +1,33 @@ +/* 512KB cache */ +unsigned microcode_updates_f2x[] = { + /* WARNING - Intel has a new data structure that has variable length + * microcode update lengths. They are encoded in int 8 and 9. A + * dummy header of nulls must terminate the list. + */ + + /* Old microcode file not present in Intel's microcode.dat. */ +#include "microcode_m02f2203.h" + + /* files from Intel's microcode.dat */ +#include "microcode-1343-m04f252b.h" +#include "microcode-1346-m10f252c.h" +#include "microcode-1338-m02f292d.h" +#include "microcode-1340-m08f292f.h" +#include "microcode-1107-m10f2421.h" +#include "microcode-1339-m04f292e.h" +#include "microcode-1105-m08f2420.h" +#include "microcode-1336-m02f2610.h" +#include "microcode-1101-m02f2738.h" +#include "microcode-1100-m04f2737.h" +#include "microcode-1341-m01f2529.h" +#include "microcode-1102-m08f2739.h" +#include "microcode-1104-m04f241e.h" +#include "microcode-1342-m02f252a.h" +#include "microcode-1106-m02f241f.h" + + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c index 8fd8abc7bf..9e8fbfc84f 100644 --- a/src/cpu/intel/model_f2x/model_f2x_init.c +++ b/src/cpu/intel/model_f2x/model_f2x_init.c @@ -10,40 +10,6 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> -/* 512KB cache */ -static uint32_t microcode_updates[] = { - /* WARNING - Intel has a new data structure that has variable length - * microcode update lengths. They are encoded in int 8 and 9. A - * dummy header of nulls must terminate the list. - */ - - /* Old microcode file not present in Intel's microcode.dat. */ -#include "microcode_m02f2203.h" - - /* files from Intel's microcode.dat */ -#include "microcode-1343-m04f252b.h" -#include "microcode-1346-m10f252c.h" -#include "microcode-1338-m02f292d.h" -#include "microcode-1340-m08f292f.h" -#include "microcode-1107-m10f2421.h" -#include "microcode-1339-m04f292e.h" -#include "microcode-1105-m08f2420.h" -#include "microcode-1336-m02f2610.h" -#include "microcode-1101-m02f2738.h" -#include "microcode-1100-m04f2737.h" -#include "microcode-1341-m01f2529.h" -#include "microcode-1102-m08f2739.h" -#include "microcode-1104-m04f241e.h" -#include "microcode-1342-m02f252a.h" -#include "microcode-1106-m02f241f.h" - - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, -}; - static void model_f2x_init(device_t cpu) { /* Turn on caching if we haven't already */ @@ -55,7 +21,7 @@ static void model_f2x_init(device_t cpu) x86_mtrr_check(); /* Update the microcode */ - intel_update_microcode(microcode_updates); + intel_update_microcode_from_cbfs(); } /* Enable the local cpu apics */ |