diff options
Diffstat (limited to 'src/cpu/intel/model_6ex')
-rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram_disable.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram_disable.c b/src/cpu/intel/model_6ex/cache_as_ram_disable.c index fcdd3f2e19..6dac367c4d 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram_disable.c +++ b/src/cpu/intel/model_6ex/cache_as_ram_disable.c @@ -54,8 +54,7 @@ void stage1_main(unsigned long bist) real_main(bist); /* No servicable parts below this line .. */ - -#if CAR_DEBUG +#ifdef CAR_DEBUG /* Check value of esp to verify if we have enough rom for stack in Cache as RAM */ unsigned v_esp; __asm__ volatile ( |